07-10-2014 07:05 AM
I have seen the thread describing this functionality: http://forums.xilinx.com/t5/Simulation-and-Verification/Tracing-vhdl-variables/m-p/430530/highlight/true#M9268
But when I run the simulator no variables show up in my objects window. Do I have to turn something on in the GUI or is this functionality broken in 2014.2?
07-10-2014 09:49 AM - edited 07-10-2014 09:49 AM
I have simulated an example design with Vivado 2014.2 and able to see that variables are correctly added in the objects window. Please check the below snapshot for your reference.
The snapshot shows that the functionality is not broken with vivado 2014.2.
07-10-2014 06:48 PM
Did you launch the simulator from within Vivado GUI?
Ensure the --debug option in Simulation Settings is not turned off.
07-11-2014 09:32 AM
The --debug option was set to typical... I changed it to all but it still doesn't work. My testbench is running correctly but I cannot see any variables in the Objects window. I would show you a screen shot but there is nothing to see. Maybe this is fixed in your software but it is not in mine.
07-11-2014 09:54 AM
So, I selected --rangecheck to ON in the simulator options and when I select "Run Simulation" a quick window pops up and then goes away and my sim will never work again. Tried restarting Vivado AND rebooting my PC and it looks like my Vivado 2014.2 project is never going to work again, so.......
I de-selected --rangecheck and shutdown Vivado 2014.2. I then opened up Vivado 2014.1 and opened the project, saved as another project to make it writeable and the sim works again.
Finally, in the Objects window I selected the "VHDL Process" clicky (by default this is off) and viola, my variables appeared in the Objects window and now I can add them to my waveform viewer.
07-11-2014 10:20 AM
So.....I assumed I was good until this point but there are still problems. When I try to add my variables I get an error. My test case was taking a "signal" and making it a "variable" and this was the result (any thoughts?)
07-17-2014 07:33 AM
07-17-2014 07:38 AM
07-17-2014 08:03 AM
12-05-2014 04:14 PM
Has this issue been adressed yet? 2014.4 came out this week but I haven't checked it yet for this feature...
05-11-2015 09:10 AM
05-11-2015 09:36 AM
10-28-2016 08:36 AM
12-22-2017 12:06 AM
any news on Vivado supporting variables in the simulator?
12-22-2017 03:03 AM
In the mean time if you need to trace variables, altera/intel provide a free version of modelsim that supports mixed language. And the newer versions can also trace access types (pointers) on the wave window too!
08-06-2019 02:13 AM
While I know this is an old thread I want to leave a tip for others.
Recently I also couldn't find how to view variables (in Vivado 2018.3) in simulation. It turns out that you have to enable "VHDL Process" in the scope (by default this is off). See screenshot below.