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Adventurer
Adventurer
305 Views
Registered: ‎01-27-2008

Vivado simulator equivalent to modelsim "-g" for generics or paramters?

Hi

I am a bit surprised that I couldn't find any posts relate to this and forgive me if I overlooked an existing post.

In modelsim it's elegant to change a parameter (using parameter interchangeably with generic across RTL langs) without recompiling using the "-g" flag in vsim.

What's the equivalent method for vivado so I don't have to continuously close_sim, change code, recompile, which is clunky?

Thanks in advance.

 

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5 Replies
Adventurer
Adventurer
250 Views
Registered: ‎01-27-2008

Re: Vivado simulator equivalent to modelsim "-g" for generics or paramters?

Hello, Any Xilinx folks out there with some ideas?

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Moderator
Moderator
240 Views
Registered: ‎04-24-2013

Re: Vivado simulator equivalent to modelsim "-g" for generics or paramters?

Hi @olupj ,

I'm not sure if this is waht you want, but you can set generic values during elaboration with the:

-generic_top <value>

This overrides the generic or parameter of a top-level design unit with specified value.

Example: -generic_top "P1=10"

Best Regards
Aidan

 

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Adventurer
Adventurer
233 Views
Registered: ‎01-27-2008

Re: Vivado simulator equivalent to modelsim "-g" for generics or paramters?

Thanks Aidan,

That seems like a synthesis step, is that also used in the processes involved in simulation? If so, how is it isolated?

How would that integrate into TCL console commands?

For instance, the goal is to not have to run "launch_sim" each time. Or if I do, controlling the parameters each time I launch_sim (using -generic_top, which is not available as an argument in launch_sim), would work.

In modelsim this is the equivalent of skipping vlog/vcom (and vopt) steps. I can set generics/parameters via the "vsim" command and iterate over design changes easily.

Please advise, best, Jerry

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Moderator
Moderator
214 Views
Registered: ‎04-24-2013

Re: Vivado simulator equivalent to modelsim "-g" for generics or paramters?

Hi @olupj ,

The -generic_top is one of the elaboration options for the xelab command.

This performs a static elaboration of the design (sets parameters, generics, puts generate statements into effect, and so forth)

You can use the export_simulation tcl command to create scripts to compile, elaborate and run the simulation. These can then be modified if needed and called later.

If you check out Chapter 7 of UG900 it has more information on running simulation via scripts:

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_1/ug900-vivado-logic-simulation.pdf

Best Regards
Aidan

 

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Adventurer
Adventurer
192 Views
Registered: ‎01-27-2008

Re: Vivado simulator equivalent to modelsim "-g" for generics or paramters?

Thanks Aidan,
Not sure if that's the solution I seek but I will investigate.
For smaller subsystems that I write testbenches against, I tend not to work from the synthesis / implementation side to export_simulation but simply read in the files I need, create the simulation set and run... that's what I hoped to achieve. This is analgous to avoiding the need to run vcom/vopt every time I want to vsim and just feed parameters into vsim modifying generics / parameters.
Thanks,
Jerry
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