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Orzica
Observer
Observer
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Registered: ‎01-02-2021

Vivado simulator signal "unsigned"

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Hi to everyone!! I just finished my AES-128 bit key encrypt module and i have a huge question, i really don t know what is going on! My "cipher_text" is wave simulator have the "unsigned" value but in my project simulator works fine. Can somebody help me understand what is going on, please?

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drjohnsmith
Teacher
Teacher
548 Views
Registered: ‎07-09-2009

just follow the code,

Where does cipher_text go unsigned ?

    what cause that to happen ?

Just follow the leads , 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>

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bruce_karaffa
Scholar
Scholar
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Registered: ‎06-21-2017

That's not unsigned, it's undefined.  The simulator cannot tell what value this signal should have.  Do all of the signals that are used to make up this signal have values?  Does everything have a defined initial value?

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drjohnsmith
Teacher
Teacher
629 Views
Registered: ‎07-09-2009

can I just ask you to expand on

"but in my project simulator works fine" please

 

Other common reason for having an unknown value on the output,

    is something like a counter coded as count <= count + 1;

    and count never being initalised.

    So in the simulator its shown as Un Defined, and is propagated through

      whilst in the chip, the counter will power up in some state , so will count.

This is done to highlight in the simulation parts of your code that could lead to a none predictable start condition, that might matter

The way to sort for in any case is the same,

   in the simulator, follow you signal back,

  In the simulator you can look at any signal in your design,

look in your code what "makes" the signal that Undefined,

    look at those signals , and see is one or more of those signals undefined.

repeat till you find the source,

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
Orzica
Observer
Observer
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Registered: ‎01-02-2021

Yes, all signals have been defined with a initial value. I checked it twice.

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Orzica
Observer
Observer
605 Views
Registered: ‎01-02-2021

As test vector i use plain_text[127 : 0] = 127'b0 and key[127 : 0] = 127'b0. For this inputs, in Object section (first red rectangle), cipher_text[127 : 0] got correct value, still in wave simulator(second red rectangle) have undefined value and i got very confused. I double checked, and all my signals have a defined value. AES have 9 main (identical) rounds and final round that not include mix columns + initial round. My signal goes from correct value to undefined from main round 1 to 2. How can i get right answer(because it s a recursive algorithm) in the first case and undefined in second? This is what makes me crazy

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drjohnsmith
Teacher
Teacher
549 Views
Registered: ‎07-09-2009

just follow the code,

Where does cipher_text go unsigned ?

    what cause that to happen ?

Just follow the leads , 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>

View solution in original post

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