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Observer jreinauld
Observer
357 Views
Registered: ‎02-24-2017

Warnings when compiling Vivado 2019.1 simulation libraries for ModelSim 10.7c

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Hello,

I just tried to compile Vivado 2019.1 simulation libraries for ModelSim 10.7c.

I get the following warnings:

WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/axis_ila_txns_cntr_v1_0_vl_rfs.v' (axis_ila_txns_cntr,xilinx.com:ip:axis_ila_txns_cntr:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/axis_dbg_stub_v1_0_rfs.v' (axis_dbg_stub,xilinx.com:ip:axis_dbg_stub:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/axi_stream_monitor_v1_0_vl_rfs.v' (axi_stream_monitor,xilinx.com:ip:axi_stream_monitor:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/axi_interface_monitor_v1_0_vl_rfs.v' (axi_interface_monitor,xilinx.com:ip:axi_interface_monitor:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/axis_dbg_sync_v1_0_vl_rfs.v' (axis_dbg_sync,xilinx.com:ip:axis_dbg_sync:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/axis_ila_intf_v1_0_rfs.v' (axis_ila_intf,xilinx.com:ip:axis_ila_intf:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/verilog/axis_itct_v1_0_0_axis_itct_ports.vh' (axis_itct,xilinx.com:ip:axis_itct:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/axis_itct_v1_0_rfs.v' (axis_itct,xilinx.com:ip:axis_itct:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_xpipe0_wires.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_xpipe00_wires.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_xpipe01_wires.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_xpipe10_wires.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_xpipe11_wires.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_xpipe12_wires.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_xpipe13_wires.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_xpipe2_wires.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_xpipe22_wires.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_xpipe23_wires.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_gt_quad0_inst.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_gt_quad00_inst.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_gt_quad01_inst.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_gt_quad10_inst.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_gt_quad11_inst.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_gt_quad12_inst.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_gt_quad13_inst.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_gt_quad2_inst.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_gt_quad22_inst.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'ttcl/versal_cips_v1_0_0_gt_quad23_inst.vh' (versal_cips,xilinx.com:ip:versal_cips:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/axis_cap_ctrl_v1_0_rfs.v' (axis_cap_ctrl,xilinx.com:ip:axis_cap_ctrl:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/trace_hub_v1_0_vl_rfs.v' (trace_hub,xilinx.com:ip:trace_hub:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/verilog/axis_mu_v1_0_0_mu_pkg.vh' (axis_mu,xilinx.com:ip:axis_mu:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/axis_mu_v1_0_rfs.v' (axis_mu,xilinx.com:ip:axis_mu:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/accelerator_monitor_v1_0_vl_rfs.v' (accelerator_monitor,xilinx.com:ip:accelerator_monitor:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/verilog/axis_mem_v1_0_0_probe_ports.vh' (axis_mem,xilinx.com:ip:axis_mem:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/verilog/axis_mem_v1_0_0_probe_width.vh' (axis_mem,xilinx.com:ip:axis_mem:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/verilog/axis_mem_v1_0_0_lib_fn.vh' (axis_mem,xilinx.com:ip:axis_mem:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/verilog/axis_mem_v1_0_0_ver.vh' (axis_mem,xilinx.com:ip:axis_mem:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/axis_mem_v1_0_rfs.v' (axis_mem,xilinx.com:ip:axis_mem:1.0)
WARNING: [setup_ip_static_library-Tcl-22] Associated library not defined for 'hdl/axis_dbg_stub_v1_0_rfs.v' (axis_dbg_stub,xilinx.com:ip:axis_dbg_stub:1.0)


Is it normal, or is there something I must correct in my setup?

Thanks!

- Julien

P.S. I attached the compilation log files

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Moderator
Moderator
322 Views
Registered: ‎05-31-2017

Re: Warnings when compiling Vivado 2019.1 simulation libraries for ModelSim 10.7c

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Hi @jreinauld ,

 

You can ignore these warnings and can move further with simulation. From the shared cxl_error.log, it seems that the ldpc library is failing to compile and which seems to be a known issue with Modelsim DE edition from the below forum thread. You can move further if you are not using the ldpc IP.

https://forums.xilinx.com/t5/Simulation-and-Verification/ldpc-library-cannot-be-compiled-in-Vivado-2018-2-with-ModelSim/td-p/880386

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4 Replies
Moderator
Moderator
323 Views
Registered: ‎05-31-2017

Re: Warnings when compiling Vivado 2019.1 simulation libraries for ModelSim 10.7c

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Hi @jreinauld ,

 

You can ignore these warnings and can move further with simulation. From the shared cxl_error.log, it seems that the ldpc library is failing to compile and which seems to be a known issue with Modelsim DE edition from the below forum thread. You can move further if you are not using the ldpc IP.

https://forums.xilinx.com/t5/Simulation-and-Verification/ldpc-library-cannot-be-compiled-in-Vivado-2018-2-with-ModelSim/td-p/880386

View solution in original post

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Observer jreinauld
Observer
317 Views
Registered: ‎02-24-2017

Re: Warnings when compiling Vivado 2019.1 simulation libraries for ModelSim 10.7c

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Hi shameera,

Thanks for your answer.

I knew about the ldpc IP generating errors.

My question was rather about the warnings I listed. Can you briefly explain what causes these, so that I underdstand?

Thanks,

- Julien 

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Moderator
Moderator
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Registered: ‎05-31-2017

Re: Warnings when compiling Vivado 2019.1 simulation libraries for ModelSim 10.7c

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Hi @jreinauld ,

These warnings were occurring when the IP static files were getting compiled. These static files are expected to be compiled in the IP library. The library name for these IP static files were not being set automatically and because of which it was giving the warning.

 

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Observer jreinauld
Observer
287 Views
Registered: ‎02-24-2017

Re: Warnings when compiling Vivado 2019.1 simulation libraries for ModelSim 10.7c

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Hi shameera,

Thanks for your answer.

If I understand correctly, for some IPs, some source file have not been compiled.

In that case, I suppose it will be impossible to simulate the IP. Is that correct?

Thanks,

- Julien

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