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helmutforren
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Registered: ‎06-23-2014

What am I doing wrong, please?

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I'm using Vivado 2017.1 and SystemVerilog.

 

I seem unable to successfully simulate reference of a particular bit buried in a structure.  I've been doing this hundreds of times before in this project, but for this particular new case, the reference doesn't work.  Specifically, I have reduced my code to a test case where

 

wire is_read_control = Read_Control_fifo_dout.dout.data.control_word_array.control_words[7].control_flag;

does not seem to work.  This is surely my problem, but I can't seem to figure it out.  (The original code does an "if" on ...control_flag and simulation doesn't go inside.  The code here has been RUN without edit before posting, and produced the simulation waveform further below.)

 

 Here is the section of actual code that doesn't do what I expect.  Since it's highly reduced, it doesn't seem to have a logical purpose. Nevertheless, the code should still simulate in a predictable manner.

 

    i_MEM_rd_fifo_din Read_Control_fifo_din();    // Instance the interface
    i_MEM_rd_fifo_dout Read_Control_fifo_dout();    // Instance the interface
    
    MEM_rd_fifo_one_clk Read_Control_fifo ( // Carries Read Control FIFOwords as well as Pass Through FIFOwords (control & data)
        .rst(MIG_Xface.ui_rst || !MIG_Xface.init_calib_complete),
        .clk(MIG_Xface.ui_clk),
        .din(Read_Control_fifo_din.din.data),
        .wr_en(Read_Control_fifo_din.din.wr_en),
        .rd_en(Read_Control_fifo_dout.dout.rd_en),
        .dout(Read_Control_fifo_dout.dout.data),
        .full(Read_Control_fifo_din.din.full),
        .prog_full(Read_Control_fifo_din.din.prog_full),
        .empty(Read_Control_fifo_dout.dout.empty)
    );

     wire is_read_control = Read_Control_fifo_dout.dout.data.control_word_array.control_words[7].control_flag;
     reg see_read_control;
     always @* begin
         if (!Read_Control_fifo_dout.dout.empty) begin
             see_read_control = Read_Control_fifo_dout.dout.data.control_word_array.control_words[7].control_flag;
             Read_Control_fifo_dout.dout.rd_en = 1;  // Read (consume) the input
         end
     end

 

Here is a SIMULATION waveform:

Debug Waveform (skinnier).jpg

Hopefully, you can see the detail on the waveform.  It's wide; maybe if you click on it will provide a zoom.  Note that I have highlighted is_read_control, see_read_control, and ...control_flag directly from the FIFO's structure.  Look where ...control_flag rises.  is_read_control should ALSO rise but doesn't.  In addition, see_read_control should get set to 1 as well, but it's not.  Surely I'm doing something wrong, but I can't see it.

 

The structures are defined in a couple of separate include.sv file.

 

 

typedef struct packed {
t_MEM_rdwr_fifo_data_word [0:7] data_words; // Run from 0:7 because control words do
} t_MEM_rdwr_fifo_data_word_array; // named structure type

typedef struct packed { t_COMMON_control_word [0:7] control_words; } t_MEM_rd_fifo_control_word_array; // named structure type typedef union packed { t_MEM_rd_fifo_control_word_array control_word_array; t_MEM_rdwr_fifo_data_word_array data_word_array; } t_MEM_rd_fifo_word; typedef struct packed { t_MEM_rd_fifo_word data; logic wr_en; logic full; logic prog_full; } t_MEM_rd_fifo_din; typedef struct packed { t_MEM_rd_fifo_word data; logic rd_en; logic empty; } t_MEM_rd_fifo_dout; interface i_MEM_rd_fifo_din; // Push into the din t_MEM_rd_fifo_din din; endinterface interface i_MEM_rd_fifo_dout; // Pop out of the dout t_MEM_rd_fifo_dout dout; endinterface

 

typedef struct packed {     // 65 BITS
logic control_flag;   //      [64:64] Control Flag
logic [1:0] writeflag;  //    [63:62] If 1 then write.  If 0 then read.  If 2 then pass through (neither read nor write) 
logic [27:0] address;  //     [61:34] Memory Address
logic [4:0] length;  //       [33:29] Memory Length (in BURSTS, 8x64bits.  This corresonds to 32 pixels)
logic [3:0] destination;  //  [28:25] (Use `DEST Defines) Used for routing packets through demultiplexers/distributors
logic [2:0] unused;   //      [24:22] Unused
logic [2:0] laneidx;  //      [21:19] Communications Lane from which this packet came, numbered 0-7 for lanes 1-8.
logic [7:0] row;      //      [18:11] Row within this lane of first data in packet
logic [7:0] col;      //      [10:03] Column within this lane of first data in packet
logic [2:0] frame_format;//   [02:00] Shorthand for number of rows, cols, and blanking
} t_COMMON_control_word; // named structure type

 

The FIFO is FWFT with this summary:

FIFO Summary.jpg

 

 

 

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helmutforren
Scholar
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2,746 Views
Registered: ‎06-23-2014

Deja Vu...  It seems interface and struct don't play well together, perhaps especially if there's "logic" declarations (with no input/output specified) inside the structs. and if not actually passing to a module.

 

I find that if I go one level deeper by using the struct rather than the interface, that is if I change

i_MEM_rd_fifo_dout Read_Control_fifo_dout();

to

t_MEM_rd_fifo_dout Read_Control_fifo_dout;

then change all references appropriately, it then works.

 

Even though the simulator runs and waveforms show contents of the structs inside interface, they are NOT actually valid or connected, or something.

 

My great amount of past usage had interfaces, but they went into subordinate modules.  This works.  I can also use that interface locally exactly as I've used it here.  But when I clone some of that code to use local only with no module call using the interface, then it doesn't work.  I realize interfaces are not for local use, but it ought to either work or give an error!

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helmutforren
Scholar
Scholar
2,747 Views
Registered: ‎06-23-2014

Deja Vu...  It seems interface and struct don't play well together, perhaps especially if there's "logic" declarations (with no input/output specified) inside the structs. and if not actually passing to a module.

 

I find that if I go one level deeper by using the struct rather than the interface, that is if I change

i_MEM_rd_fifo_dout Read_Control_fifo_dout();

to

t_MEM_rd_fifo_dout Read_Control_fifo_dout;

then change all references appropriately, it then works.

 

Even though the simulator runs and waveforms show contents of the structs inside interface, they are NOT actually valid or connected, or something.

 

My great amount of past usage had interfaces, but they went into subordinate modules.  This works.  I can also use that interface locally exactly as I've used it here.  But when I clone some of that code to use local only with no module call using the interface, then it doesn't work.  I realize interfaces are not for local use, but it ought to either work or give an error!

View solution in original post

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