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rtfinch
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Registered: ‎01-06-2016

[XSIM 43-3294] Signal EXCEPTION_ACCESS_VIOLATION received when changing structure

In Vivado 2020.1 using the System Verilog language if a structure is modified and sim relaunched the following error occurs:

[XSIM 43-3294] Signal EXCEPTION_ACCESS_VIOLATION

Printing stacktrace...

[0] (KiUserExceptionDispatcher+0x2e) [0x7ffa58470cae]
[1] (Verific::VeriScope::Using+0x30) [0x7ff9a86a2d00]
[2] (Verific::VeriScope::RestoreUsingSet+0x7c) [0x7ff9a84cc4ac]
[3] (Verific::VeriScope::VeriScope+0x12b) [0x7ff9a84bfbdb]
[4] (Verific::VeriTreeNode::RestoreScopePtr+0x4c) [0x7ff9a84cc34c]
[5] (Verific::VeriModule::VeriModule+0x55f) [0x7ff9a84bdfbf]
[6] (Verific::VeriTreeNode::CreateObject+0x134e) [0x7ff9a84c8bee]
[7] (Verific::VeriTreeNode::RestoreNodePtr+0x40) [0x7ff9a84cc0b0]
[8] (Verific::veri_file::Restore+0x465) [0x7ff9a84cafd5]
[9] (Verific::VeriLibrary::GetModuleInternal+0x1b9) [0x7ff9a861bd19]
[10] (Verific::veri_file::GetModuleFromLOptions+0x101) [0x7ff9a8726a01]
[11] (Verific::VeriModuleInstantiation::GetInstantiatedModule+0x103) [0x7ff9a8651353]
[12] (OPENSSL_Applink+0x2a669) [0x7ff792a59c09]
[13] (Verific::VeriVisitor::TraverseArray+0x49) [0x7ff9a871dfd9]
[14] (OPENSSL_Applink+0x29c80) [0x7ff792a59220]
[15] (OPENSSL_Applink+0x2b938) [0x7ff792a5aed8]
[16] [0x7ff7926f3967]
[17] [0x7ff7926f2c39]
[18] [0x7ff792703882]
[19] [0x7ff792702bb1]
[20] (boost::archive::detail::iserializer<boost::archive::binary_iarchive,ModuleSerialization>::load_object_data+0x167e7f9) [0x7ff7942f1889]
[21] (BaseThreadInitThunk+0x14) [0x7ffa56a77034]

To avoid this, a new simulation set is created and sim closed then re-run whenever structures change.

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