01-25-2014 06:49 AM
The following module should return 6'b110011, but instead it just hangs xsim 2013.4:
module issue_021(y); output [5:0] y; assign y = 6'd3 ** 123456789; initial #10 $display("%b", y); endmodule
XSim 2013.4 seems to try to evaluate this expression by performing 123456789 multiplications instead of using a proper power-modulus algorithm.
In my tests I have run this module with:
xvlog issue_021.v xelab -R work.issue_021
Crosscheck: Modelsim 10.1d can simulate this module in an instant and Vivado 2013.4 can synthesize it correctly. Isim 14.7 and XST 14.7 seem to suffer from a similar problem.
01-26-2014 10:05 AM
In case the Vivado Tool does synthesize it well and not the ISE, then i guess that is something to do with the way XST handles the code. Which device are you targetting. In case you are targetting the 7 series device, it is better to go for Vivado.
01-26-2014 12:31 PM
thanks for your reply. Usually I annotate the my bug reports with "Note: This is a bug report. I don't need support.". I've forgotten it this time.
Regarding XST: I posted this as an XSIM bug report only because my XST bug reports only got "we don't fix bugs in XST anymore" replies. But as you brought up XST: This clearly is a problem with high level synthesis and will happen for any target device.
In the context of this bug reports I don't really target any specific device, I'm systematically identifying bugs in a couple of tools and so far have identified and reported 19 bugs, including 10 bugs in Xilinx tools (2 in XST, not counting this one, 4 in vivado and 4 in xsim):
My hope is that this bug reports will help fixing this bugs before anyone has to spend hours (or even days) identifying those bugs from production code that "mysteriously" does not work with one of those tools. Chances are that this happened already, but people did not file bug reports.
01-27-2014 09:50 PM
04-21-2014 11:29 PM