09-26-2014 12:29 AM
We are using Xilinx Virtex 4 FPGA in our hardware and we want to simulate the hardware completely.
We have the processor simulation in Simics (An Intel's product). When we trigger loading of software from an external entity onto the emulated board, the processor takes care of distributing the loaded software to various devices. The software also has FPGA binary embedded into it and is checking for the respective FPGA simulator to exist.
Hence if we have the Xilinx simulator in place, the FPGA binary can be loaded onto it just as in the real hardware.
Could you please let us know if you have the simulator available for Xilinx Virtex 4 FPGA.
Thanks & Regards,
09-26-2014 01:26 AM
Do you want to simulate FPGA design like HDL, NGC or bit file?
If it is FPGA design that you want to simulate then you can use Xilinx ISIM or any thrird party simulators like Modelsim.
Please check this links
If in case you want to simulate the deisgn when running on FPGA, called Hardware cosimulation please check below link
09-26-2014 02:23 AM
Thanks for the information.
I am looking for the simulators used by xilinx to test the designed FPGA and to buy the license if available.
I may need the exact simulator (designed in simcs) which replicates the bare FPGA circuit so that I can load my application specific FPGA binary on top of it.
09-26-2014 05:36 PM
Simulating the bitstream of an FPGA is not possible. What you can do is simulate the final placed and tortured design with back annotated timing in a Verilog or VHDL simulator such as iSim or ModelSim.
09-29-2014 11:50 PM
as I could read in this presentation
simics has interfaces to HDL simulators.
e.g. the memory simulation is done via a VHDL simulation and it's said to be time accurate.
So there should be a way to tie simics to some other HDL simulator and use a post-par netlist (and sdf file) for a timing simulation of the FPGA within the system.
Maybe you should ask the simics support how HDL simulators can be controlled via simics and which products are supported.
The exported HDL netlist and the necessary libraries can be compiled and simulated by almost any professional HDL simulator.
Have a nice simulation
09-30-2014 04:22 AM
I have already tried earlier as per your view to interface simics with verilog but there are some performance issues lying behind.
Hence, I would like to go with simulating the bare FPGA circuit in simics so that I can load the unmodified FPGA application binary on top of it.
So, could you please provide the recessary documentation to simulate the complete FPGA i.e memory maps of all the devices in FPGA, Design specification etc.