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Visitor
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Registered: ‎07-12-2012

Xilinx's ISIM vs Modelsim difference?

Anyone know the differences between the two simulators?

 

I had a model that incorporated an EMAC core generated from the Core Gen that worked fine when simulated in ISIM.

 

However, I was trying to then simulate it in Modelsim (since that is what the rest of the project I'm workin on is simulated in) and it turns out that all of the output pins from the EMAC core has an output of "X" which I'm assuming is because it's uninitialized. Anyone encountered this? 

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