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Visitor cloud9
Visitor
12,018 Views
Registered: ‎03-31-2015

clk is not a port

fyi

 

how to solve this problem?

 

thx for help me...

error.jpg
error1.jpg
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7 Replies
Xilinx Employee
Xilinx Employee
12,012 Views
Registered: ‎02-16-2014

Re: clk is not a port

Hi,

 

I see some critical warnings related to syntax errors in your design.

Please check them in messages window.

 

Can you post them here?

if possible post your code here

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Visitor cloud9
Visitor
12,007 Views
Registered: ‎03-31-2015

Re: clk is not a port

thx for ur help. there is my code,

 

module basicio(clk,sw,btnU,seg,an,led);
    parameter N7 = 7;
    parameter N16 = 16;
    parameter N4 = 4;
    input [N16-1:0] sw;
    output [0:N7-1] seg;
    output [N4-1:0] an;
    output [N16-1:0] led;
   
    wire[11:0] address;
    wire[17:0] instruction;
    wire[7:0] port_in,in_port,out_port;
    wire write_strobe;
    wire interrupt_ack;
    wire read_strobe;
    reg [7:0] out_port_reg;
    embedded_kcpsm6 U(port_id,write_strobe,read_strobe,out_port,in_port,interrupt,interrupt_ack,btnU,clk);
   
    always @(posedge clk)
    begin
        if (write_strobe)
            begin
                out_port_reg = out_port;
            end
    end
   
    hex2_7seg H(out_port_reg,seg);
    assign an = 4'b0111;
    assign in_port = sw;
    assign led = out_port_reg;
endmodule

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Xilinx Employee
Xilinx Employee
12,004 Views
Registered: ‎02-16-2014

Re: clk is not a port

Hi,

 

I see only 4 ports are declared in the module.

 

Clk and btnU are not declared in the module.

Please declare them as you declared for other 4 ports.

 

eg:

input clk;

input btnU;

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Visitor cloud9
Visitor
11,994 Views
Registered: ‎03-31-2015

Re: clk is not a port

okay, thx

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Xilinx Employee
Xilinx Employee
11,989 Views
Registered: ‎02-16-2014

Re: clk is not a port

Hi,

 

Did that help?

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Visitor cloud9
Visitor
11,963 Views
Registered: ‎03-31-2015

Re: clk is not a port

it still does not works, but i think there is the problem, kcpsm6 and prog_rom should be under basicio. how to solve it?

Untitled.jpg
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Xilinx Employee
Xilinx Employee
11,952 Views
Registered: ‎02-16-2014

Re: clk is not a port

Hi,

 

kcpsm6 and prog_rom files has some syntax errors.That's why they are not compiled and they should be under syntax error files.

Please attach those two files to check what are those syntax errors.

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