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Visitor
Visitor
1,454 Views
Registered: ‎05-24-2018

[common 17-180] spawn failed: No such file or directory during IP generation: For Active-HDL

UNISIM library compilation for Active-HDL fails in both Vivado 2015.4 and 2018.1. Multiple [common 17-180] errors are followed by [Vivado 12-5602] and [Common 17-39].

 

 

The 2018.1 console log is listed below:

 

Compiling libraries for 'active_hdl' simulator in 'C:\Xilinx\Vivado\2018.1\lib'
ALIB: Library `secureip' attached.
secureip = C:\Xilinx\Vivado\2018.1\lib\secureip\secureip.lib
--> Compiling 'verilog.secureip' library...
    > Source Library = 'C:\Xilinx\Vivado\2018.1\data/secureip'
    > Compiled Path  = 'C:\Xilinx\Vivado\2018.1\lib\secureip'
ERROR: [Common 17-180] Spawn failed: No error
    > Log File       = 'C:\Xilinx\Vivado\2018.1\lib/secureip/.cxl.verilog.secureip.secureip.nt64.log'

compile_simlib[verilog.secureip]: 1 error(s), 22 warning(s), 33.33 % complete
Please refer to the messages between 'BEGIN_COMPILATION_MESSAGES(active_hdl:verilog:secureip)' and 'END_COMPILATION_MESSAGES(active_hdl:verilog:secureip)' in the log file compile_simlib.log for details of compilation error(s).

ALIB: Library `unisim' attached.
unisim = C:\Xilinx\Vivado\2018.1\lib\unisim\unisim.lib
--> Compiling 'vhdl.unisim' library...
    > Source Library = 'C:\Xilinx\Vivado\2018.1\data/vhdl/src/unisims'
    > Compiled Path  = 'C:\Xilinx\Vivado\2018.1\lib\unisim'
ERROR: [Common 17-180] Spawn failed: No error
    > Log File       = 'C:\Xilinx\Vivado\2018.1\lib/unisim/.cxl.vhdl.unisim.unisim.nt64.log'
ALIB: Library `unimacro' attached.
unimacro = C:\Xilinx\Vivado\2018.1\lib\unimacro\unimacro.lib
--> Compiling 'vhdl.unisim:vhdl.unimacro' library...
    > Source Library = 'C:\Xilinx\Vivado\2018.1\data/vhdl/src/unimacro'
    > Compiled Path  = 'C:\Xilinx\Vivado\2018.1\lib\unimacro'
ERROR: [Common 17-180] Spawn failed: No error
    > Log File       = 'C:\Xilinx\Vivado\2018.1\lib/unimacro/.cxl.vhdl.unimacro.unimacro.nt64.log'
compile_simlib[vhdl.unisim:vhdl.unimacro]: 1 error(s), 1 warning(s)
INFO: Please refer to the messages between 'BEGIN_COMPILATION_MESSAGES(active_hdl:vhdl:unimacro)' and 'END_COMPILATION_MESSAGES(active_hdl:vhdl:unimacro)' in the log file compile_simlib.log for details of compilation error(s).

ALIB: Library `unifast' attached.
unifast = C:\Xilinx\Vivado\2018.1\lib\unifast\unifast.lib
--> Compiling 'vhdl.unisim:vhdl.unifast' library...
    > Source Library = 'C:\Xilinx\Vivado\2018.1\data/vhdl/src/unifast'
    > Compiled Path  = 'C:\Xilinx\Vivado\2018.1\lib\unifast'
ERROR: [Common 17-180] Spawn failed: No error
    > Log File       = 'C:\Xilinx\Vivado\2018.1\lib/unifast/.cxl.vhdl.unifast.unifast.nt64.log'
compile_simlib[vhdl.unisim:vhdl.unifast]: 1 error(s), 1 warning(s)
INFO: Please refer to the messages between 'BEGIN_COMPILATION_MESSAGES(active_hdl:vhdl:unifast)' and 'END_COMPILATION_MESSAGES(active_hdl:vhdl:unifast)' in the log file compile_simlib.log for details of compilation error(s).


compile_simlib[vhdl.unisim]: 3 error(s), 3 warning(s), 66.67 % complete
Please refer to the messages between 'BEGIN_COMPILATION_MESSAGES(active_hdl:vhdl:unisim)' and 'END_COMPILATION_MESSAGES(active_hdl:vhdl:unisim)' in the log file compile_simlib.log for details of compilation error(s).

ALIB: Library `xpm' attached.
xpm = C:\Xilinx\Vivado\2018.1\lib\xpm\xpm.lib
--> Compiling 'vhdl.xpm' library...
    > Source Library = 'C:\Xilinx\Vivado\2018.1\data/ip/xpm'
    > Compiled Path  = 'C:\Xilinx\Vivado\2018.1\lib\xpm'
    > Log File       = 'C:\Xilinx\Vivado\2018.1\lib/xpm/.cxl.vhdl.xpm.xpm.nt64.log'

compile_simlib[vhdl.xpm]: 0 error(s), 1 warning(s), 100.00 % complete

********************************************************************************************
*                                  COMPILATION SUMMARY                                     *
*                                                                                          *
*  Simulator used: active_hdl                                                              *
*  Compiled on: Thu Sep  6 10:39:20 2018                                                   *
*                                                                                          *
********************************************************************************************
*  Library                        | Language | Mapped Library Name | Error(s) | Warning(s) *
*------------------------------------------------------------------------------------------*
*  secureip                       | verilog  | secureip            | 1        | 22         *
*------------------------------------------------------------------------------------------*
*  unisim                         | vhdl     | unisim              | 3        | 3          *
*------------------------------------------------------------------------------------------*
*  unimacro                       | vhdl     | unimacro            | 1        | 1          *
*------------------------------------------------------------------------------------------*
*  unifast                        | vhdl     | unifast             | 1        | 1          *
*------------------------------------------------------------------------------------------*
*  xpm                            | vhdl     | xpm                 | 0        | 1          *
*------------------------------------------------------------------------------------------*

ERROR: [Vivado 12-5602] compile_simlib failed to compile for active_hdl with error in 6 libraries (cxl_error.log)
compile_simlib: Time (s): cpu = 00:00:01 ; elapsed = 00:00:16 . Memory (MB): peak = 828.426 ; gain = 0.000
ERROR: [Common 17-39] 'compile_simlib' failed due to earlier errors.

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3 Replies
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Moderator
Moderator
1,432 Views
Registered: ‎05-31-2017

HI @jgbaldw,

 

Can you once check if Vivado is running under sandbox of your antivirus? You can disable anti-virus and check if it helps.

Also, please make sure that you are using the compatible simulator. As you are using VIvado 2018.1 Active HDL 10.4a is the compatible simulator. Please check the same at page 19 of UG 973

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Visitor
Visitor
1,328 Views
Registered: ‎05-24-2018

Long delay, but I've just upgraded to Active-HDL 10.5a (previously I was using 9.3). Unfortunately, this did not help, and I still encounter "spawn failed" errors when I attempt to compile the UNISIM library.

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Moderator
Moderator
1,320 Views
Registered: ‎04-24-2013

Hi @jgbaldw,

 

While Aldec simulators are supported to work with Vivado, support for issues with them is provided by Aldec and not XIlinx.

 

This is documented in User Guide 973.

Capture.JPG

Aldec should be able to either provide a compiled set of libraries for the version of the tools that you are using or be able to help with the compilation issue.

 

What you could try is to compile the libraries into a location that you know you have full write permissions to.

Looking at the error log above it appears that you are trying to compile them into "C:\Xilinx\Vivado\2018.1\lib"

 

Best Regards
Aidan

 

 

 

 

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