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Visitor kkhalfallah
Visitor
151 Views
Registered: ‎03-03-2014

iSim graphical waveform misalignment

Hi everyone,

I'm seeing this bug on Vivado (2018.2.1, currently downloading 2018.3 ...)

As you can see on the first screenshot below (e.g note the blue divider rows) there is a vertical misalignment between the 3 columns, and this makes it really difficult for the eye to quickly detect which signal corresponds to which waveform (and vice-versa). 

iSim_waveform_bottom.pngMisalignment increases as one goes down to the bottom of the window

 

The misalignment increases as you navigate down to the bottom of the waveform window & it is always absent from top of the window, which therefore appears perfectly alright, as one can see on this second screenshot:

iSim_waveform_top.pngAlignment is always OK on top of window

It seems that this bug is related to the presence of expanded VHDL records. On the 3rd screenshot below, which shows the whole waveform window after collapsing the one big "r." VHDL record signal, one can see that the alignment is now OK, even at the bottom of the window.

iSim_waveform_whole.pngMisalignment disappears as one "collapses" ("unexpands") all signals of type "record" (VHDL)

 

I've seen this bug for years on different versions of ISE, and now it has "reappeared" on Vivado (2018.2.1)...

I am currently downloading version 2018.3, I'll post tomorrow if this corrects the bug.

Please note that I am working on Linux ... ;-)

Thanks a lot in advance!

Karim

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5 Replies
Moderator
Moderator
122 Views
Registered: ‎09-15-2016

Re: iSim graphical waveform misalignment

Hi @kkhalfallah,

Please check in Vivado 2018.3 and if you are still facing any issues. Then please share a test case with the steps to be followed to reproduce this issue at our end.

Thanks & Regards,
Sravanthi B
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Visitor kkhalfallah
Visitor
106 Views
Registered: ‎03-03-2014

Re: iSim graphical waveform misalignment

Hi,

The bug also appears with Vivado 2018.3.

I've noticed that it is related to the height of the waveform window: the misalignment only appears when the height is high enough. Actually it seems to appear when height exceeds approx. 1400 pixels (I have a 4K screen).

Below are two Vivado screnshots: they are exactly the same, except that the 2nd one was taken _after_ increasing the height of the waveform window high (the Tcl console is now very thin)

iSim_waveform_nobug.pngBug disappears when height of waveform window is is less than some value

 

iSim_waveform_bug.pngBug (misalignment) appears when height of waveform window exceeds some value

Note that the 2 screenshots above were taken with the "r." VHDL record signal expanded.

Thanks in advance!

Karim

 

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Moderator
Moderator
64 Views
Registered: ‎09-15-2016

Re: iSim graphical waveform misalignment

Hi @kkhalfallah,

The issue seems to be resolution dependent. Can you please try adjusting the user defined scaling option from settings in Vivado 2018.3 and check if it helps:

scaling.JPG

Thanks & Regards,
Sravanthi B
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Visitor kkhalfallah
Visitor
34 Views
Registered: ‎03-03-2014

Re: iSim graphical waveform misalignment

Hello @bandi

Thanks for your reply.

Adjusting the user defined scaling (125%, 150%, 90 %,  ... instead of the default 100%) does not solve the issue, however it brings out some "correlation": bug behaviour is different, in the sense that sometimes the misalignment appears, and sometimes it does not...

Furthermore, increasing the scaling above 100% makes me lose significant visual comfort (actually now that I have discovered this setting option, I switched to 90%)

Thanks & Regards,

Karim

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Moderator
Moderator
20 Views
Registered: ‎09-15-2016

Re: iSim graphical waveform misalignment

Hi @kkhalfallah,

Are you seeing a better waveform if you set the scaling to 90%?

Can you please share a test case to check at our end and also what is the exact resolution of your machine?

Which OS are you working upon?

Thanks & Regards,
Sravanthi B
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