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Explorer
Explorer
3,775 Views
Registered: ‎05-14-2017

ila doesn't display "waiting for trigger". after I hit the <Trigger> button

I'm using the xilinx ILA to debug my FPGA. I hit the trigger button and the Tcl console registered that "It is ARMED" but my ILA doesn't state "waiting for trigger". There is no waveform update after I applied the trigger input.either.

This didn't happened before but after I added more signal into the ILA and re-implementd and reloaded it with the new bit file, this happen.

Seem like I didn't do anything different but added more signal and clock domain to my ila core.

 

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12 Replies
Moderator
Moderator
3,740 Views
Registered: ‎09-15-2016

Re: ila doesn't display "waiting for trigger". after I hit the <Trigger> button

Hi @tchin123

 

Couple of things to check:

1) Once you complete the "set up debug flow" when adding new signals, make sure the new signals are connected to the debug core.

2) After the implementation run, check whether the .ltx file is updated with the new signals or not.

 

Also try deleting the *.wdb and *.wcfg files before you add the new signals and do the ila flow.

Hope this helps.

 

Regards

Rohit

PS: Your ILA frequency should be double or more than double to your JTAG frequency and the frequency of the signals probed.

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Regards
Rohit
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Moderator
Moderator
3,708 Views
Registered: ‎09-15-2016

Re: ila doesn't display "waiting for trigger". after I hit the <Trigger> button

Hi @tchin123,

 

1. Does the design meets timing? Check if the clock connected to ILA is free running.

2. Is your trigger condition dependent on any control signal ? (like reset etc.) . Check if the trigger condition meets.

 

As @thakurr mentioned, please make sure that the JTAG cable frequency is less than the ILA clock frequency.

Also, please try reducing the JTAG frequency and see if that helps.

 

Thanks & Regards,

Sravanthi b

Thanks & Regards,
Sravanthi B
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Moderator
Moderator
3,653 Views
Registered: ‎09-15-2016

Re: ila doesn't display "waiting for trigger". after I hit the <Trigger> button

Hi @tchin123

 

Did the suggestions help? Let us know the status at your end.

 

Regards

Rohit

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Regards
Rohit
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Explorer
Explorer
3,647 Views
Registered: ‎05-14-2017

Re: ila doesn't display "waiting for trigger". after I hit the <Trigger> button

The ila status still shows IDLE after I Armed the trigger.

 

I did check the debug core after I added more signals and clock domain and they are there.

The ila clock are 125Mhz and 16Mhz, these were OK and work but then I added more signal with a new domain clock at 625Khz.

 

next I removed these added signal and 625Khz but now it didn't help, still doesn't show "waiting for trigger"

Maybe it is not the added signals but something got corrupted within vivado.

 

I reboot PC and rebuild the whole implementation (added a space in one of vhdl file) process but it didn't help.

kinda stuck

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Moderator
Moderator
3,639 Views
Registered: ‎09-15-2016

Re: ila doesn't display "waiting for trigger". after I hit the <Trigger> button

Hi @tchin123

 

What is your JTAG frequency? 625 KHZ is very less frequency when you probe  more signals. Make sure your ILA clock frequency is double or more than that to the JTAG frequency.

Also did you try deleting the *.wdb and *.wcfg files before you add the new signals and do the ila flow.

 

Regards

Rohit

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Regards
Rohit
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Explorer
Explorer
3,636 Views
Registered: ‎05-14-2017

Re: ila doesn't display "waiting for trigger". after I hit the <Trigger> button

No I didn't remove the wfg nor the wdb, where are they located?

 

I usually don't touch those file. I have modify my debug core multiple time during my debug phase and this problem hardly occur.

It did occurred earlier but it usually goes away after I reboot PC or rebuild my bit file.

But this time none of these action help.

 

How is the JTAG frequency determine, how do I find this frequency

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Moderator
Moderator
3,633 Views
Registered: ‎09-15-2016

Re: ila doesn't display "waiting for trigger". after I hit the <Trigger> button

Hi @tchin123

 

>>No I didn't remove the wfg nor the wdb, where are they located?

They are located in the Vivado directory where you save the configuration. Refer page 229, for more information on this:

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_2/ug908-vivado-programming-debugging.pdf

 

>>How is the JTAG frequency determine, how do I find this frequency

Refer page 36, below link:

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_2/ug908-vivado-programming-debugging.pdf

 

Hope this helps.

Regards

Rohit

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Regards
Rohit
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Explorer
Explorer
3,622 Views
Registered: ‎05-14-2017

Re: ila doesn't display "waiting for trigger". after I hit the <Trigger> button

I'm using a diligent usb cable on my board which ug908 state it will default to 15 Mhz.

I thought this speed is use to configure the FPGA.

I have 3 debug core at 125mhz, 16mhz and 625khz respectably. If I choose to only armed the first debug core with 125Mhz, should the other ila clock affect it from arming?

 

In addition, are you saying if I were to use the 625khz instead that this is too slow compare with the JTAG speed and would cause the ila from functioning?

 

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Moderator
Moderator
3,609 Views
Registered: ‎07-01-2015

Re: ila doesn't display "waiting for trigger". after I hit the <Trigger> button

Hi @tchin123,

 

There can be many reasons for the issue.

As I can see you have a 635khz ILA you need jtag frequency half or less than half of 625khz.

So you can try using a higher clock frequency for ILA. It will lead to oversampling but atleast you can be able to debug.

 

 

Thanks,
Arpan
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Explorer
Explorer
2,605 Views
Registered: ‎05-14-2017

Re: ila doesn't display "waiting for trigger". after I hit the <Trigger> button

OK, I have removed all the signals from the 625khz domains and it seem to ARM now.

As I starts adding more signals into my other two ila clock domains the ila went back to my previous problem of not arming.

 

All my debug nets are entered from the source file using MARK_DEBUG. something is not clear, it seem like vivado doesn't like certain nets in the debug core. Implementation always pass with no error but the ila just doesn't function correctly when certain nets are included.

Is there certain criteria on what nets ILA is acceptable.

 

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Moderator
Moderator
2,600 Views
Registered: ‎07-01-2015

Re: ila doesn't display "waiting for trigger". after I hit the <Trigger> button

Hi @tchin123,

 

If frequencies criteria met and timing also met then the nets should not have any issue.

  1. Signals being probed should have frequency half or less than half of ILA clock.
  2. JTAG frequency should be half or less than half of ILA clock frequency.
    Can you please explain what is the behavior you are seeing with certain nets?
    Implementation will not look into the ILA clock rules. It will look into scenarios such as any signal being trimmed or removed or not able to be routed. 
Thanks,
Arpan
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Explorer
Explorer
2,597 Views
Registered: ‎05-14-2017

Re: ila doesn't display "waiting for trigger". after I hit the <Trigger> button

Timing are met and ILA clock vivado select when signal are added to the ILA core.

When in Debug mode, I either select the ARM Trigger or run Trigger immediately button.

 

1) When ARMIng the ILA , Vivado will display status as "waiting for trigger" >> This does nor happen

2) When Trigger immediate, Vivado will display waveform >> This dose not happen neither.

 

There is two file called xxx.ltx and xxx_net.ltx what is the different.

Is there a number of signal limitation per ila core, can this be the issues. I have over 300 signal split between 2 clock domains

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