UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor gayu.123
Visitor
210 Views
Registered: ‎03-13-2019

output waveform is not being generated in model sim for DES algorithm. Is there any way to fix it?

We have attached the verilog code and test bench for Data encryption standards algorithm and are not getting the waveform even though they are showing zero errors..

0 Kudos
2 Replies
Moderator
Moderator
180 Views
Registered: ‎05-31-2017

Re: output waveform is not being generated in model sim for DES algorithm. Is there any way to fix it?

0 Kudos
Xilinx Employee
Xilinx Employee
133 Views
Registered: ‎07-16-2008

回复: output waveform is not being generated in model sim for DES algorithm. Is there any way to fix it?

How did you launch simulation? Can you see signal objects to be added to waveform?

-------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
0 Kudos