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1,184 Views
Registered: ‎05-26-2015

proceedure acting on variables fails to run

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I have a simple procedure that fails to run when the output parameters are variables, but works when they are signals. test_proc1 works, but text_proc2 never updates any variables or signals. Test_proc1 is a proceedure with output signals that get updated. test_proc2 is identicale but the outputs are shared variables, and the variables are assigned to signals using a concurrent statement. Either test_proc2 never runs or the assignment statements fail. I am sure there is a simple explanation, but I can't figure it out.

See the attached files for a better formatted file.

 

 

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;


entity test_tb is
end test_tb;

architecture sim of test_tb is
constant period : time := 10 ns;
--signal ptr : integer range 1 to 10 := 1;
signal clk : std_logic := '0';
signal rst : std_logic := '1';
signal stb1 : std_logic := '1';
signal reg1 : std_logic_vector(7 downto 0);
shared variable vstb2 : std_logic := '1';
shared variable vreg2 : std_logic_vector(7 downto 0);
signal stb2 : std_logic := '1';
signal reg2 : std_logic_vector(7 downto 0);

procedure test_proc1 (
signal clk : in std_logic;
signal stbout : out std_logic;
signal regout : out std_logic_vector(7 downto 0)
) is
begin
wait for 10 ns;
stbout <= '0';
regout <= x"55";
wait for 10 ns;
stbout <= '1';
wait for 10 ns;
stbout <= '0';
wait for 10 ns;
regout <= x"00";
wait for 10 ns;
end procedure test_proc1;

procedure test_proc2 (
signal clk : in std_logic;
variable stbout : out std_logic;
variable regout : out std_logic_vector(7 downto 0)
) is
begin
wait for 10 ns;
stbout := '0';
regout := x"55";
wait for 10 ns;
stbout := '1';
wait for 10 ns;
stbout := '0';
wait for 10 ns;
regout := x"00";
wait for 10 ns;
end procedure test_proc2;

begin

p_rst : process
begin
rst <= '1';
wait for 5*period;
rst <= '0';
wait;
end process;

p_clk : process
begin
clk <= '0';
wait for period/2;
clk <= '1';
wait for period/2;
end process;


p_proc1 : process
begin
wait until rst = '0';
wait until clk = '0';
test_proc1(clk,stb1,reg1);
test_proc2(clk,vstb2,vreg2);
wait until clk = '0';
test_proc1(clk,stb1,reg1);
test_proc2(clk,vstb2,vreg2);
end process;

stb2 <= vstb2;
reg2 <= vreg2;

end sim;

test_proc.JPG
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1 Solution

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Scholar richardhead
Scholar
1,640 Views
Registered: ‎08-01-2012

Re: proceedure acting on variables fails to run

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The problem is with the signal assignments from the shared variables:

 

stb2 <= vstb2;
reg2 <= vreg2;

 

Signal assignments are like inferred processes. Processes need an 'event to trigger if you want them to re-trigger after time 0. The problem is, variables are not signals, they have no 'event attribute and hence cannot trigger a process, and cannot update your signals outside of a process. So in effect is what you have is:

 

 

process
begin
  stb2 <= vstb2;
  reg2 <= vreg2;
  wait;
end process;

You need to be assigning the signals inside the p_proc1 process after the variables have been updated:

 

p_proc1 : process
  begin
    wait until rst = '0';
    wait until clk = '0';
    test_proc1(clk,stb1,reg1);
    test_proc2(clk,vstb2,vreg2);
    stb2 <= vstb2;
    reg2 <= vreg2;
    wait until clk = '0';
    test_proc1(clk,stb1,reg1);
    test_proc2(clk,vstb2,vreg2);
    stb2 <= vstb2;
    reg2 <= vreg2;
  end process;

Also: none of your stimulus generation processes have a final wait statement. So they will loop forever. p_proc1 will go and wait for another reset which will never happen. That means if you use run -all, it will run forever.

 

And finally - technically, having shared variables like this is illegal from vhdl2002. All shared variables are supposed to be protected types. But most tools ignore this error by default to maintain backwards compatability. 

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5 Replies
Scholar richardhead
Scholar
1,641 Views
Registered: ‎08-01-2012

Re: proceedure acting on variables fails to run

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The problem is with the signal assignments from the shared variables:

 

stb2 <= vstb2;
reg2 <= vreg2;

 

Signal assignments are like inferred processes. Processes need an 'event to trigger if you want them to re-trigger after time 0. The problem is, variables are not signals, they have no 'event attribute and hence cannot trigger a process, and cannot update your signals outside of a process. So in effect is what you have is:

 

 

process
begin
  stb2 <= vstb2;
  reg2 <= vreg2;
  wait;
end process;

You need to be assigning the signals inside the p_proc1 process after the variables have been updated:

 

p_proc1 : process
  begin
    wait until rst = '0';
    wait until clk = '0';
    test_proc1(clk,stb1,reg1);
    test_proc2(clk,vstb2,vreg2);
    stb2 <= vstb2;
    reg2 <= vreg2;
    wait until clk = '0';
    test_proc1(clk,stb1,reg1);
    test_proc2(clk,vstb2,vreg2);
    stb2 <= vstb2;
    reg2 <= vreg2;
  end process;

Also: none of your stimulus generation processes have a final wait statement. So they will loop forever. p_proc1 will go and wait for another reset which will never happen. That means if you use run -all, it will run forever.

 

And finally - technically, having shared variables like this is illegal from vhdl2002. All shared variables are supposed to be protected types. But most tools ignore this error by default to maintain backwards compatability. 

View solution in original post

Moderator
Moderator
1,145 Views
Registered: ‎05-31-2017

Re: proceedure acting on variables fails to run

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Hi @skeptonomicon,

 

In addition to @richardhead suggestions, the assigning of the signals inside the process like below also will not work in your scenario i.e., you will get a constant output for the signals stb2 and reg2 because the assignment is nothing but an sequential assignment for the signal, it would consider the last value that is assigned to the variable. Therefore as per your code you will get the value constant value 0 for both the signals stb2 and reg2.

p_proc1 : process
  begin
    wait until rst = '0';
    wait until clk = '0';
    test_proc1(clk,stb1,reg1);
    test_proc2(clk,vstb2,vreg2);
    stb2 <= vstb2;
    reg2 <= vreg2;
    wait until clk = '0';
    test_proc1(clk,stb1,reg1);
    test_proc2(clk,vstb2,vreg2);
    stb2 <= vstb2;
    reg2 <= vreg2;
  end process;

Thanks & Regards,
A.Shameer.

 

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Highlighted
1,087 Views
Registered: ‎05-26-2015

Re: proceedure acting on variables fails to run

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Thanks, that clears up the variable thing.

 

On your comments about not having a wait at the end, are you confusing this with a process. I thought procedures ran once and were done.

 

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Scholar richardhead
Scholar
1,071 Views
Registered: ‎08-01-2012

Re: proceedure acting on variables fails to run

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Yes, I was referring to processes.

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1,060 Views
Registered: ‎05-26-2015

Re: proceedure acting on variables fails to run

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richardhead,

I see what you mean now. I left off the process. I didn't notice since I never ran the sim that long.

 

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