12-05-2018 02:29 AM
I'm having problems trying to figure out how to run back annotation with questasim 10.7c. The Xilinx documentation requires you to run the simulator with the -novopt option so that the sdf matches the Verilog netlist. Questasim 10.7c does not support -novopt, so when I try to run back annotation I get errors due to the Verilog netlist not matching the sdf file. I am unable to find anything in the Xilinx documentation about options for questasim 10.7c. I contacted Mentor about this and they gave me some options to suppress errors just to make the back annotation run, but I'm not so sure the timing is correct since the simulation database always gets optimized. Has anyone else run into this?
12-05-2018 05:40 PM
The compatible Questasim version with the latest Vivado is 10.6c.
The deprecation of '-novopt' in Questasim/Modelsim 10.7 will cause trouble in compile_simlib in the current Vivado release.
For SDF annotation, I think the flow is the same. If you launch Questasim from Vivado, the tool will perform 3-step simulation, including vopt. Which documentation did you refer to that suggests -novopt for timing simulation?
12-06-2018 05:39 AM
ug900 indicates -novopt should be used. I get errors if I don't use it because the Verilog and sdf no longer match. Basically questasim always optimizes from this version on. You can only control how much it optimizes. You cannot turn it off. You can suppress the errors with the right options, but then it's not clear to me if the timing is accurate.
If you want to contact the Mentor representative I spoke with, email me at firstname.lastname@example.org and I can send you more information.
12-07-2018 12:35 AM
I checked UG900 v2018.2, and only found -novopt mentioned in config_compile_simlib usage.
If you look at the timing sim scripts exported by Vivado with compatible Questasim version, you still see 3-step. vopt is performed prior to vsim.
I don't think -novopt is a necessity for timing simulation.