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9,293 Views
Registered: ‎02-11-2015

sdfanno

hello

when is try to simulate my desing , ISIM can not find the sdf file, and it says that cant find hirachary....

i found that i can use sdfanno to fix the problem, the problem is i dont know how to use this command and coz i never used isim comand window im not good in it please if any one knows how to use it give an breif decription about it

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3 Replies
Xilinx Employee
Xilinx Employee
9,290 Views
Registered: ‎02-06-2013

Re: sdfanno

Hi

 

Check below link

 

http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/ism_cl_sdfanno.htm

Regards,

Satish

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9,284 Views
Registered: ‎02-11-2015

Re: sdfanno

suppose that  i want to add sdf file for    

archit..  RTL of  mine , ...

..

;;

 

located in D\project\mine

and the genrated sdf file is   timesim.sdf

how should i add it to command window

thankss

 

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Xilinx Employee
Xilinx Employee
9,261 Views
Registered: ‎07-16-2008

Re: sdfanno

One way to learn the appropriate command is to use ISE project mode.

For Verilog, the SDF annotation is specified in post-route simulation netlist (.v). You can open the _timesim.v and search for SDF.

If the SDF location matches the one in simulation netlist, it would be annotated.

 

For VHDL, once the simulation executable is generated by fuse command, you can run command like below to apply the SDF annotation.

tb.exe -sdfmax /uut/=D:/project/mine/timesim.sdf -sdfroot /uut

Replace uut with your root hierarchy.

 

For more information on the simulation options, please refer to ISIM User Guide (UG660).

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