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Explorer
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Registered: ‎08-23-2011

xilinx clock_generator logicore IP and simulation in VCS?

hi,

 

i had a question regarding some xilinx logicore IP libraries that may be being used in my vcs simulation. the name of the libraries are -

clk_gen_ddr3c_0_v4_03_a

clk_gen_ddr3c_1_v4_03_a

clock_generator_0_v4_03_a

axi_sys_v1_00_a

 

i have looked in ISE 14.1 and older versions and I could not see clk_gen or clock_generator libraries. however another thread in xilinx forums says that these libraries would be available in XPS. 

 

i wanted to confirm if these libraries are available in XPS only or can they be found in EDK as well?

 

is there any way of accessing/generating these libraries via ISE?

 

in case these IPs are present in XPS only, then do i need to have an installation directory of XPS as well to be able to use these IPs and libraries? Since I dont have XPS, will it be fine to simply have a 3rd person generate the vcs_mx libraries for the above mentioned IPs and if I include the folder paths in the synopsys_sim.setup, it should work in my local simulation? or would the compiled folders have some dependency on the XPS installation directory or machine dependency?

 

is there any list which shows the above 4 logicore IPs will be available in which xilinx tool?

 

Please let me know ...

 

thanks in advacnce,

z.

 

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