02-05-2019 07:34 AM - edited 02-05-2019 07:37 AM
In the new Vivado 2018.3, are all the features of VHDL2008 supported?
This is completely support for simulation.
As I have never used OSVVM/UVVM so I do not have enough knowledge to look at the Xilinx docs and decide.
Is there a straightforward answer?
I want to use UVVM and having looked at their webpage https://bitvis.no/dev-tools/uvvm/ when you read the 'Supported simulators' section, it says "Vivado: Awaiting proper VHDL 2008 support".
02-06-2019 03:20 PM
As I understand it, the support for VHDL2008 is 'not' claimed to be complete, but is noted as a 'synthesizable subset'.
Hope that helps (even if disappointing :-)
If so, please mark as solution accepted to close the issue. Kudos also welcomed. :-)
02-07-2019 03:43 AM
Was expecting someone from Xilinx to answer.
Yes,I guess as long as Xilinx is not asking for a fee to use xsim they will drag their feet on complete VHDL2008 support. It is more than 10 years now that VHDL2008 was released.
For OSVVM/UVVMusage, I think I will have to choose a different simulator.