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Visitor nel_ge
Visitor
2,983 Views
Registered: ‎07-10-2017

Data corrupted in True Dual Port Block RAM (Spartan-6)

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Hi,

 

I am facing data corruption problem in my design based on Spartan-6.

My internal dual port memory (RAMB16) (used for data transfer) lost randomly few bits after several days in use.

My interfaces are correctly designed and nothing explains why content of the RAM is corrupted by change of a single random bit (from 1 to 0).

The problem is hard to reproduce and to understand.

 

Does anyone already faced data lost / corruption in BRAM in Spartan-6 ?

Any idea ?

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Xilinx Employee
Xilinx Employee
5,027 Views
Registered: ‎09-20-2012

Re: Data corrupted in True Dual Port Block RAM (Spartan-6)

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Hi @nel_ge

 

On which address locations did you see the data errors?

 

If you have noticed the data errors on the first address location of BRAM, then this AR is applicable https://www.xilinx.com/support/answers/42571.html

Thanks,
Deepika.
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Xilinx Employee
Xilinx Employee
5,028 Views
Registered: ‎09-20-2012

Re: Data corrupted in True Dual Port Block RAM (Spartan-6)

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Hi @nel_ge

 

On which address locations did you see the data errors?

 

If you have noticed the data errors on the first address location of BRAM, then this AR is applicable https://www.xilinx.com/support/answers/42571.html

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)

View solution in original post

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Xilinx Employee
Xilinx Employee
2,955 Views
Registered: ‎09-05-2007

Re: Data corrupted in True Dual Port Block RAM (Spartan-6)

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Assuming you have solid synchronous interfacing with each port that meets all timing then I recommend that you carefully review the descriptions on page 15 of UG383 (v1.5) as there are some corner cases that could result in the corruption of a memory cell. Only you know the precise way in which you have configured the BRAM and how it is being accessed so do see if you are hitting one of those corner cases. 

Ken Chapman
Principal Engineer, Xilinx UK