06-16-2014 05:10 AM
I try to implement memory controller on Spartan 6 xc6lx75-3csg484 but it doesn’t work for the moment.
I have NANY- NT5CB64M16FP it’s 128mb ddr3 Sdram.
I’m looking for one example which works.
Think a lot.
06-16-2014 05:18 AM
check the following link for the DDR3 design for sp605 board
06-16-2014 07:21 AM
Please go through UG388 for list of Supported memory devices.
I think Nanya is not hardware evaluated by Xilinx so we cannot assure that it works.
But you have not mentioned what is not working.
As you cannot genearte MIG for Nanya part you would have use custom part, please check if all the timing parameters were properly set as per nanya datasheet.
Go through Debugging section of UG and figure which stage of calibration is failing and if any data errors
Make sure your clocking and reset circuitry is proper and board layout guideliness were met
Go through below master AR and follow the steps outlined.
Hope this helps
06-16-2014 08:57 AM
06-16-2014 06:13 PM
You mean to say default MIG is working but you see data errors with your own traffic?
If yes please follow the command, write and read timing diagrams in UG388 and cross check against your signals.
If this is in HW I would sugget you to verify in simulation.