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Visitor luoyu510183
Registered: ‎05-10-2017

ISE14.5: different results of Implement Design


Today I meet a really weird situation. At first, I try to probe some output data wires from ISERDES module. So I attach a CDC file to my project.When I implement my code, I find that my USB3.0 module does not response to PC'

s request. That's the first time of this bug. 

Then for debugging purpose, I remove this CDC file and attach a new CDC file to probe the USB module's main state machines. But after I implement this code, the USB module is back to normal.

I don't understand why this situation happens. Because I never change my source code, the Synthesize results are the same. So can you tell me why the CDC file will change the function of my module?And how to prevent from it?


Thank You!

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Xilinx Employee
Xilinx Employee
Registered: ‎08-01-2012

Re: ISE14.5: different results of Implement Design

Seem to some problem in initial CDC file. Please check design




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