05-27-2014 06:14 PM
i have met a strange problem when i using a spartan6 FPGA
when i scan the JTAG using ISE , the message shows "unknown bypass" and the FPGA could not be programmed.
the Vref is 3.3V , and i measure the voltage of JTAG and results are as belows:
and i change the Vref to 2.5V, the FPGA could be scanned sometimes, but not always,
sometimes the error meassage shows" a problem may exist in the hardware configuration"
and i measure the voltage of JTAG, the results are as belows:
the voltages are somehow strange.
the error message is as belows:
p.s: the schematic is as belows:
what may be the problem? could someone give some advice?
05-27-2014 09:15 PM
Please note that you have to give proper voltages Vref at the JTAG header based on the voltage VCCAUX which you are giving to the FPGA. Check the screenshot below.
What is the VCCAUX power on your FPGA?
I also observed that a pullup was not given in the user guide on these lines. TDI, TMS by default have internal pullup's which you can check from Pg 69 of UG 380 - http://www.xilinx.com/support/documentation/user_guides/ug380.pdf
Also Read through the below references which should help you indenfity the problem.
1) Make sure you have followed all the guidelines in the JTAG ISP checklist - http://www.xilinx.com/support/documentation/application_notes/xapp104.pdf
2) Also check the JTAG programmer Troubleshooting from Pg 55 of the link - http://www.xilinx.com/support/sw_manuals/2_1i/download/jtag.pdf
05-28-2014 06:30 PM
the situation has some change
1.the VCCAUX is 3.3V ;
2.when i give the Vref 2.5V-3.3V, especially the Vref is 2.5V-3.0V, the JTAG chain could be scanned on the ISE , and the chip is normal, but when the Vref is 3.1-3.3V, the boundary scan sometimes works, sometimes fails to work.
That is to say, sometimes the ISE could find the chip(150T);
sometimes the ISE could not find the chip, ISE shows "unknown bypass", the boundary scan is not steady.
and the schematic stays unchanged.
and what could be the problem?
05-29-2014 04:59 AM
In that case, please probe the TCK, TMS, TDI, TDO pins when the operation fails and check what is the difference.
This should help you narrow down to your problem. Check when the device is detected and when it is not detected and then compare. however the voltage of Vref should be same as that of the Vccaux.
Check if the JTAG connector is fine. Probe the JTAG lines on the board also if possible.
06-05-2014 05:28 AM
The external pull-up for JTAG pins are not required for Spartan-6 because the FPGA JTAG internal circuitry has required.internal pull-up resisters. The additional external pull-up (4k7) may cause sink current (drive strength) problems. Please remove the additinal pull-up resisters and let us know the status