03-09-2010 03:55 AM
I am using spartan 6 FPGA in my design. I want to configure the FPGA through processor. So i have connected the processor GPIOs to FPGA JTAG signals (TMS, TDI, TDO & TCK).
Mainly I want to know what will be the minimum JTAG clock (TCK) that the Spartan 6 FPGA can accept?
11-22-2012 08:14 PM
I am facing some difficulty in JTAG chain congiguration through freescale P1012 processor.
Can you send me the procedure for JTAG cofig.
I need to write XSVF through this.