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Adventurer
Adventurer
1,000 Views
Registered: ‎06-19-2015

Minimum frequency for Coolrunner II CPLDs

Hi,

 

  What is the minimum frequency advisable for CRII CPLDs. Can I give a 20/50Hz clock signal as input. Also, can I use 555 timer/opamp based oscillators for this purpose?

 

Thanks and Regards,

Arvind Gupta

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Xilinx Employee
Xilinx Employee
970 Views
Registered: ‎06-30-2010

Re: Minimum frequency for Coolrunner II CPLDs

there is no min for the clock, what are you clocking with this?
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Teacher
Teacher
961 Views
Registered: ‎07-09-2009

Re: Minimum frequency for Coolrunner II CPLDs

provided you meet the voltage requirements, you can use a 555 etc to drive the cpld.

 

 

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Adventurer
Adventurer
948 Views
Registered: ‎06-19-2015

Re: Minimum frequency for Coolrunner II CPLDs

Thanks for your response. Sometimes one requires a 10 ms / 20 ms etc delays. For such feature, one requires to count the number of clock pulses. If the system clock is in MHz range, the size of the counter increases. So if I put a slow clock as a second clock input, this reduces the size of the counter.

 

Regards,

Arvind Gupta

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Xilinx Employee
Xilinx Employee
935 Views
Registered: ‎06-30-2010

Re: Minimum frequency for Coolrunner II CPLDs

that makes sense, there is also the clock divider that can divide from 2 to 16 times that may help slow the clock down more if needed

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