cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
eric_fpga
Observer
Observer
10,239 Views
Registered: ‎09-01-2014

Problem in Implementing the 32bit initiator/target PCI Core

Jump to solution

Hi

I've got evaluation license for PCI Core and want to design with Spartan3an.I can synthesize it, but when I want to implement my design(PCI Core is included)

I've got this error:

NgdBuild:604 - logical block 'PCI_CORE/PCI_LC' with type 'PCI_LC_I' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, case mismatch between the block name and the edif or ngc file name, or the misspelling of a type name. Symbol 'PCI_LC_I' is not supported in target 'spartan3a'.

Can someone help me?

0 Kudos
1 Solution

Accepted Solutions
ezequielsasky
Explorer
Explorer
17,996 Views
Registered: ‎02-22-2010
4 Replies
ezequielsasky
Explorer
Explorer
10,222 Views
Registered: ‎02-22-2010

Take a look at table 1 http://www.xilinx.com/support/documentation/ip_documentation/pci32/v4_18/pci_32_ds206.pdf

 

Which version of the core you are using?

 

Is your device supported?

 

 

0 Kudos
eric_fpga
Observer
Observer
10,219 Views
Registered: ‎09-01-2014

I'm using version 3.167 of PCI Core.My device is xc3s200AN,its not supported,but according to Coregenerator software this IPCORE can be generated for my device.

Anyway,even when I choose XC3S400AN-FGG400-5C that is supported,I got the same error.

What is this for?

0 Kudos
ezequielsasky
Explorer
Explorer
17,997 Views
Registered: ‎02-22-2010
eric_fpga
Observer
Observer
10,183 Views
Registered: ‎09-01-2014

Thank you very very much.It works

0 Kudos