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mckinjo4
Explorer
Explorer
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Registered: ‎05-22-2008

Rebooting a Spartan6 configured in Master Serial mode by Platform Flash by issuing IPROG

I am attempting to reconfigure a Spartan 6 by issuing the IPROG command from the HW ICAP and have been unable to do so.

 

The Spartan6 is configured in Master Serial Mode from a Xilinx Platform Flash XCF32P.

 

The FPGA design includes a microblaze with an AXI HW ICAP.

 

In UG380 , table 7.1 it shows what it says are the sequence of necessary data writes to the HW ICAP Write Fifo. I have attempted these and it does not cause the FPGA to reconfigure. I have attempted this sequence of writes with every possible 8-bit opcode for the top 8-bits in Gen2 and Gen4 registers. I have looked over these forums for similar posts. As a result of this search I have tried the same sequence, but with additional writes, to the COR2 register, as well as the MODE register. My application code is below:

 

void write_icape2(u32 write_data)
{
    u32 write_control = 1;

    //write word to ICAPE2 W rite FIFO Register
    //XIo_Out32(XPAR_HWICAP_0_BASEADDR+0x100,write_data);
    XHwIcap_WriteReg(XPAR_HWICAP_0_BASEADDR, 0x100, write_data);

    // write to ICAPE2 Control Register to initiate a write
    //XIo_Out32(XPAR_HWICAP_0_BASEADDR+0x10C,0x1);
    XHwIcap_WriteReg(XPAR_HWICAP_0_BASEADDR,0x10C,0x1);

    //wait for write control bit to clear
    while(write_control)
    {
        write_control = XIo_In32(XPAR_HWICAP_0_BASEADDR+0x10C) & 0x1;
        /*usleep(1);*/
        /*pause(500000);*/
    }
}

void reload_fpga(u32 address, u8 opcode)
{
        u16 data, data2;
        
        /*write_icape2(0xFFFF);*/
        /* Changed to yse Driver Macros */
        write_icape2(XHI_DUMMY_PACKET); //Dummy word
        write_icape2(XHI_DUMMY_PACKET); //Dummy word
        write_icape2(XHI_SYNC_PACKET1);//Sync word
        write_icape2(XHI_SYNC_PACKET2); //Sync word
        write_icape2(XHI_NOOP_PACKET); //TYPE 1 NO OP

        write_icape2(XHwIcap_Type1Write(XHI_GENERAL1)|0x0001); //TYPE 1 write 1 words to GENERAL1
        data = address & 0xffff;
        write_icape2(address & 0xffff); //Mulitboot Start Address(15 -0)

        write_icape2(XHwIcap_Type1Write(XHI_GENERAL2)|0x0001); //TYPE 1 write 1 words to GENERAL2
        data2 = ((address & 0x00ff0000) >> 16) | (((u16)opcode) << 8);
        write_icape2(data2); //Mulitboot Start Address(23-16)

        write_icape2(XHwIcap_Type1Write(XHI_GENERAL3)|0x0001); //TYPE 1 write 1 words to GENERAL3
        write_icape2(data); //Fallback Start Address(15 -0)

        write_icape2(XHwIcap_Type1Write(XHI_GENERAL4)|0x0001); //TYPE 1 write 1 words to GENERAL4
        write_icape2(data2); //Fallback Start Address( 23-16)


        write_icape2(XHwIcap_Type1Write(XHI_MODE_REG)|0x0001); //TYPE 1 write 1 words to MODE REG
        write_icape2(0x2100); //

        write_icape2(XHwIcap_Type1Write(XHI_COR2)|0x0001); //Write COR2
        write_icape2(0x89EE);

        write_icape2(XHwIcap_Type1Write(XHI_CMD)|0x0001); //TYPE 1 write 1 words to CMD
        write_icape2(XHI_CMD_IPROG); //IPROG

        write_icape2(XHI_NOOP_PACKET); //TYPE 1 NO OP
        write_icape2(XHI_NOOP_PACKET); //TYPE 1 NO OP
        write_icape2(XHI_NOOP_PACKET); //TYPE 1 NO OP
        write_icape2(XHI_NOOP_PACKET); //TYPE 1 NO OP
}

int main()
{

    init_platform();
    int index;
    /*cycle through every opcode*/
    for(index=0;index<255;index++)
    {
        xil_printf("Hello World %d\n\r",index);
        reload_fpga(0x00000000,index);
        print("Did Not reboot\n\r");
    }
    return 0;
}

 

Has anyone been able to use IPROG to reconfigure a Spartan6 in Master Serial mode?

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