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Scholar embedded
Scholar
12,446 Views
Registered: ‎06-09-2011

SP6 power consumption issue

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Hi,

I have designed a custom Spartan6 board - xc6slx45-3FGG484I - with below voltage and hardware specifications:

1- VCCO is 3.3v -only bank3 is 1.8V for DDR-II interface -
2- VCCAUX is also 3.3v
3- VCCINT is 1.24v  extended mode.
4- Bank3 is only dedicated to DDR-II interface which is still not implemented in VHDL. However, memory is mounted -1 Gb Micron DDR-II.
5- I have connected 37 pins to GND in order to make a virtual ground for capacitors that are being mounted behind FPGA.
6- I have used tps6213x switching regulators for 3.3V, 1.8V and 1.24V:tps62132, tps62131, tps62130A
7- There are less than 40 IOs used and the rest are left over unused.
8- Input voltage for borad is 9.2V from an external power supply with current limiting knob.
9- Design has a 40MHz input oscillator wich DCM generates a 160MHz clock for uBlaze and a 50MHz for reading 5 SPI ADCs - SPI clock would be 25MHz - and XPower Analyzer reports a 0.303 W of total power (it is a rough estimate because I didn't have specified all things in Analyzer)

Below is my observations:

When the board came back from assembly, it only wasted about 150mA (9.2V) and SP6 was operating very cool. After some days of working with this amount of power today it started to increase dissipation gradually and SP6 was getting warmer. After 1 or 2 hours of working the input current increased to 250 mA and now it has reached to 340 mA. Even now that i am writing this thread it increased little by little to 370 mA :-( ?!

Now, SP6 is hot - I guess it is about 40C?!- I don't see what has caused this. I am so worry as my previous SP6 behaved like this until it jumped to 0.6A (9.2V) some days ago and burnt!..

I would really appreciate any help and comments.

Hossein

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1 Solution

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Scholar austin
Scholar
21,257 Views
Registered: ‎02-27-2008

Re: SP6 power consumption issue

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Looks like 3.3v is the culprit,

 

The 3.3v current is too high (in my opinion) with no pattern loaded.  And, that it varies when you touch it isn't a good sign.  A visual inspection with a magnifier is in order.


Either the 3.3v device you touch is not soldered correctly, and is actually applying the wrong voltage (or oscillating), or as a consequence of applying the wrong voltage, the FPGA device is damaged.  Another possibility is that the 3.3v IO's are being to gorund that want to go high, or held high, that want to go low.  But that would go away with no configuration.

 

Yes, pull out the virtual ground IO's and see what happens (maybe they are wired wrong, or programmed incorrectly).

 

What are the voltages measuring?  Do they change when the current changes?

 

The device will survive a junction temperature of 125C, so if it ever did get that hot, you would get burned if you touched it.  The heat will not cause damage until it exceeds that value.  Something is wrong, and the device may be damaged, but I would not worry about it getting "too hot" until you cannot keep a finger on it (without burnjing your finger).

 

As crude as it sounds, apply a dab of water to your finger before touching the device (so you do not burn yourself)!

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
11 Replies
Instructor
Instructor
12,439 Views
Registered: ‎08-14-2007

Re: SP6 power consumption issue

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CMOS chips will dissipate more power as they heat up.  You can see this in the Xpower estimator by changing the ambient temperature.  However the rate at which your power goes up seems to be too much to be explained by self-heating.  I would suggest putting a scope on all of the supplies to make sure you don't have overvoltage (possibly just spikes rather than a constantly high voltage), especially on Vccint which is already set high.  The only other observation is to check your pad report to make sure you haven't inadvertently placed any outputs (other than those driving a zero) on one of the virtual ground pins.  My gut feeling is that this is an overvoltage issue, however given that you seem to be slowly burning out the chip.

-- Gabor
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Scholar austin
Scholar
12,431 Views
Registered: ‎02-27-2008

Re: SP6 power consumption issue

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And...

 

A sudden change in power without any change to the design might be caused by a electrostatic discharge damaging part of the device.  That often is fatal, but it also may be the case that the part damaged is not required by your design.

 

Which supply is using this extra current?  Vccint, Vccaux, or the Vcco?

 

What happens when no design is loaded (an empty design)?

 

If it operates with little current when loaded with a simple design (just create a design with an input pin connected to an output pin and nothing else), then the power is related to the design itself as noted.


If the nearly empty design is drawing significant power, then the device is either damaged, or your voltages are out of specification (as mentioned).


Note that at or below the absolute maximum specifications, one does not expect any harm or damage.

 

But any stress in excess on an IO pin, or supply pin may have caused damage (check all IO and supplues).

Austin Lesea
Principal Engineer
Xilinx San Jose
Scholar embedded
Scholar
12,412 Views
Registered: ‎06-09-2011

Re: SP6 power consumption issue

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Hi Gabor,

 

Thanks for your comments. I should say that I am using fixed switching regulators - for 3.3V and 1.8V - which deliver nominal voltage on output. To make sure, I checked it with oscope and didn't see any spikes during normal operation. However, as you can see there are some spikes at the very begining/end of time, when I switch the power on/off. Time scale: 20uS and Volt scale: 1V - Yellow curve -> VCCINT, Blue curve -> 3.3V - I'm wondering if these very short spikes can cause any damage to device? You see that they go two times of Absolute Maximum Ratings. VCCINT goes even to 2.5V - very short time -  and VCCIO also goes to 4.8V :-(

 

DS0133.jpg

start time

 

DS0136.jpg

Power down

thanks,

Hossein

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Scholar embedded
Scholar
12,411 Views
Registered: ‎06-09-2011

Re: SP6 power consumption issue

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Gabor,
Would you please tell me how and where I can do below suggestion:
" The only other observation is to check your pad report to make sure you haven't inadvertently placed any outputs (other than those driving a zero) on one of the virtual ground pins. "
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Scholar embedded
Scholar
12,407 Views
Registered: ‎06-09-2011

Re: SP6 power consumption issue

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Dear Austin,

thanks for your comment. I measured voltages and currents:

VCCINT current is 15mA (No Load) and reaches to maximum of 25mA when design is loaded.

VCCO(1.8V) current is only 8mA.

VCCO(3.3V) current without design - no config - was about 0.8A :-( and when I loaded design it reached to about 0.9A with some changes and after some hours it dropped down to about 0.6A ?! Now, after reapiting ON/OFF it is 0.718A

I don't see why my VCCO behaves like this?! at first, this design was working with about (0.15A,9.2V) input and now it is (0.42A,9.2V)?!

From the begining, without a design loaded to FPGA it wastes mentioned power.

I have observed that voltages are all in their specified range except to the begining and end of operation -as I explained in previous post for Gabor.

I need an urgent help on finding the source of problems. I am wondering if using IOs as virtual ground may caused such strange behavior or my switching regulators caused this problem. I am so worry if the device burns. Please help!.

Thanks,
Hossein

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Scholar embedded
Scholar
12,402 Views
Registered: ‎06-09-2011

Re: SP6 power consumption issue

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Now, I had a strange observation. I pressed my 3.3V regulator - it is a QFN device - and I saw that current reduced significantly to about 0.48A for 3.3V? What does it mean? I am so confused? how should I relate the regulator chip assembly to FPGA power consumption?
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Scholar austin
Scholar
21,258 Views
Registered: ‎02-27-2008

Re: SP6 power consumption issue

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Looks like 3.3v is the culprit,

 

The 3.3v current is too high (in my opinion) with no pattern loaded.  And, that it varies when you touch it isn't a good sign.  A visual inspection with a magnifier is in order.


Either the 3.3v device you touch is not soldered correctly, and is actually applying the wrong voltage (or oscillating), or as a consequence of applying the wrong voltage, the FPGA device is damaged.  Another possibility is that the 3.3v IO's are being to gorund that want to go high, or held high, that want to go low.  But that would go away with no configuration.

 

Yes, pull out the virtual ground IO's and see what happens (maybe they are wired wrong, or programmed incorrectly).

 

What are the voltages measuring?  Do they change when the current changes?

 

The device will survive a junction temperature of 125C, so if it ever did get that hot, you would get burned if you touched it.  The heat will not cause damage until it exceeds that value.  Something is wrong, and the device may be damaged, but I would not worry about it getting "too hot" until you cannot keep a finger on it (without burnjing your finger).

 

As crude as it sounds, apply a dab of water to your finger before touching the device (so you do not burn yourself)!

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
Scholar embedded
Scholar
12,381 Views
Registered: ‎06-09-2011

Re: SP6 power consumption issue

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Dear Austin,
Thank you for your comment and help. Voltages are in their nominal range. I've not seen any changes when design is loaded. I should add that at first it was operating normally -0.15A,9.2V- after nearly one hour it increased to about 0.25A supply current and little by little reached to 0.45A supply current. Now, it has decreased to 0.32A but chip is still getting hot. I am agree with you that it is a high current for 3.3V. Would it be a good idea if I disconnect virtual grounds? Is it a wise way if I first take BGA and cut virtual ground traces, then reinstall the chip?

 

Thanks,
Hossein

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Scholar austin
Scholar
12,374 Views
Registered: ‎02-27-2008

Re: SP6 power consumption issue

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h,

 

If virtual grounds are implemented correctly (i.e. strong driver drving a "0" to ground) then it should be no issue at all.

 

It almost sounds like the drviers are driving a "1" to ground, or a "0" to Vcco?

 

As it heats up, the device gets weaker in drive strength, but flattens out?  Since that IS NOT happening, I am mystified!

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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Instructor
Instructor
8,662 Views
Registered: ‎08-14-2007

Re: SP6 power consumption issue

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It really sounds like electrical overstress, and I think the virtual grounds are a red-herring.  For one thing the current rise happens without a design loaded (double-check that this is true - DONE pin should stay low).  If the power supply is glitching on each turn-on / turn-off cycle, then you might expect degradation that gets worse with each power-cycle, but not necessarily with on-time.

 

I really think you need to go through the complete pinout of the device to make sure you're not connecting 3.3V to some pin that should not have it, but also to verify that all power and ground pins are properly connected.

 

If the schematic shows that all power/ground connections are correct, you still might have a connection issue if the board layout designer did not correctly position the balls.  I have seen this sort of problem with PADS layout where the designer had some rows swapped (for example A, B, C, E, D, F, ...), so now I always double-check the PCB footprint before releasing a board design for manufacture.

 

There's all kinds of speculating we can do on the forums, but in the end you need to dig into this yourself...

-- Gabor
Scholar embedded
Scholar
8,626 Views
Registered: ‎06-09-2011

Re: SP6 power consumption issue

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Dear Austin and Gabor,

 

Thank you both very much for your wise comments. You are right. tps62132 - 3.3V regulator - had a pitfall resulted by incorrect soldering of a 0 ohm resistor. There is a special pin FB which must be connected directly to GND for this regulator. Our technician had not correctly soldered this 0 ohm resistor. Indeed, it was float! :-( and caused the output to vary sometimes even beyond maximum ratings of VCCIOs!. After a meticulous inspection - touching regulator and observing a drastic fall in current - I came to this conclusion that it must be a part around the regulator or itself!. I tested everything and found that resistor. Although our FPGA is damaged now I finally found that mysterious problem. I really appreciate your help.

 

Thanks again,
Hossein M.S.

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