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Visitor
Visitor
5,787 Views
Registered: ‎08-07-2013

SelectIO Wizard (lvds) input clock question

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I use camera  link receiver template of selectIO wizard 4.1 to generate a ip core on spartan 6. my question is that it seems the input clock in the ip core (CLK_IN_P & CLK_IN_N) is not the very clock of  normal flat lcd lvds clock. for example,  the frequency of clock pair is 40MHz for SVGA and the serialized data frequency is 280MHz. but selectIO wizard assumes the input clock is 280MHz? because I saw it divided the input clock to 1/7 in the source code.

 

 

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Visitor
Visitor
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Registered: ‎08-07-2013

Re: SelectIO Wizard (lvds) input clock question

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I didn't use the template but refer to xapp1064 instead

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Historian
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Registered: ‎02-25-2008

Re: SelectIO Wizard (lvds) input clock question

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@powerviewchn wrote:

I use camera  link receiver template of selectIO wizard 4.1 to generate a ip core on spartan 6. my question is that it seems the input clock in the ip core (CLK_IN_P & CLK_IN_N) is not the very clock of  normal flat lcd lvds clock. for example,  the frequency of clock pair is 40MHz for SVGA and the serialized data frequency is 280MHz. but selectIO wizard assumes the input clock is 280MHz? because I saw it divided the input clock to 1/7 in the source code. 


Wow, that is weird.

 

 

----------------------------Yes, I do this for a living.
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Visitor
Visitor
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Registered: ‎02-21-2014

Re: SelectIO Wizard (lvds) input clock question

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i am also facing the same problem.at my device side, i am getting the clock 1/7 times my original clock.have u solved the problem.plz help me.

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Moderator
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Registered: ‎02-16-2010

Re: SelectIO Wizard (lvds) input clock question

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could you show the wizard snapshots?
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Visitor
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Registered: ‎08-07-2013

Re: SelectIO Wizard (lvds) input clock question

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I didn't use the template but refer to xapp1064 instead

View solution in original post

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