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Adventurer
Adventurer
6,224 Views
Registered: ‎06-04-2010

Simple "place anywhere" clock multiplier for Spartan 6?

I'm working on a design that needs to be re-configurable and can have any one of it's I/O pins configured as a clock for some internal logic. This logic needs an FSM to run at 2x the clock, and then needs to drive any of the other I/O pins.  I initially tried a DCM but got the error described here:

 

http://www.xilinx.com/support/answers/34545.html

 

Is there a simpler way/primitive that would allow me to generate a simple x2 clock multiplier anywhere in the FPGA and not have to worry about locality?  Speed is not a concern.... the input clock is like 10Mhz if that. 

 

Thanks!

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Xilinx Employee
Xilinx Employee
6,180 Views
Registered: ‎07-31-2012

Re: Simple "place anywhere" clock multiplier for Spartan 6?

Hi, You can use the PLL_BASE or PLL_ADV primitives. Please check pg 98 - http://www.xilinx.com/support/documentation/user_guides/ug382.pdf
Thanks,
Anirudh

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