UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Visitor jrjbertram
Visitor
14,078 Views
Registered: ‎09-23-2007

Spartan 3 Starter Kit - programming design

Hi,
 
I'm looking for information on how to program the Spartan 3 on the Spartan 3 Starter Kit.  I've looked at the user manual that came with the board and believe I'm missing something.  When I program the board, I now have iMPACT telling me that the board is programmed, and I can verify the programming.  I can either program the FPGA with my .bin file, or I can program the PROM with the PROM file I generate from the bin file. 
 
In one class of attempts to program the board, I have the jumpers set to the "default, load from PROM" mode where upon reset the FPGA will obtain its configuration from the PROM.. with this jumper setting, ISE appears to be able to take control of the board via JTAG and reports that programming succeeds.  I assume that this mode of programming is invalid, but ISE/IMPACT do not give me an error. 
 
In the second class of attempts to program the board, I have the jumpers set to the JTAG programming mode as described in the manual (and as explained in one of the previous posts on the thread by one of the Xilinx moderators).  In this case, I don't see any difference in programming the board.  ISE/IMPACT does not report an error, and in this mode I can also verify that what I programmed was put in either the FPGA or in the PROM, depending on what I attempt to program.
 
I believe I have the correct part and package selected in ISE.  One thing I'm not sure about is the speed setting for the device.. I wasn't sure how to determine that from the silk screening on the packaging of the part.  I tried both speeds offered in ISE, but that didn't seem to matter.
 
I believe that what I'm doing is incorrectly loading the PROM, or loading the correct data (.bin) but in the wrong format.  ISE / IMPACT by default wants to generate an mcs (if I remember correctly) formatted PROM file.. does that sound like the right format?  Or do xilinx FPGAs / PROMs expect a different format?
 
Selecting the "program the serial PROM attached to this FPGA" while programming my .bin into the FPGA didn't seem to matter.
 
I do know that I can communicated with the board in some fashion.  The board had the clock demo loaded on it.  After downloading the example from the xilinx website and attempting to load the board several times (with minor tweaks to the VHDL) with no apparent change, I tried to erase the PROM manually, and that succeeded.  On reboot, the board now comes up in what looks similar to what I see when I set the board up to wait for JTAG programming.  One thing I notice is that all of the segments in the 7-segment LEDs seem to be lit dimly.. not sure if that's a clue.
 
Does this sound like what I'm programming into the board is bad, or am I missing an important step in the procedure to program the flash part itself?  It seems that I'm programming it if IMPACT can verify the image after programming it.  Erase and blank check seem to be working like you'd expect; a subsequent program and verify also appear to work.  I'm stumped.
 
Thank you,
- Josh.


Message Edited by jrjbertram on 09-24-2007 11:27 AM
0 Kudos
4 Replies
Xilinx Employee
Xilinx Employee
13,996 Views
Registered: ‎08-28-2007

Re: Spartan 3 Starter Kit - programming design

HI Josh,

To program your FPGA you have two options. Either program from the PROM by Power Cycling or pulsing PROG or configuring using iMAPCT via JTAG.

JTAG will always be available regardless of on board settings. So if you have your board set to load from the PROM you can still program vis JTAG using iMPACT.

If you intend on loading from the PROM you will need to program the PROM via JTAG using iMPACT. Power Cycling or ulsing PROG will then load your design. You can ptogram the PROM usign a variety of formats: MCS, TEK, UFP, EXO, BIN and HEX. If you use iMPACTs PROM file Formatter to generate a PROM file you can use any of these.

A description of PROM file formats: http://www.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1&iCountryID=1&getPagePath=476

Steps you should attempt to get the flow right:

First off start by setting the mode to JTAG programming FPGA using iMPACT with a .bit file from the Starter Kit examples
Take this bit file and generate an MCS usign iMPACTs PROM File Formatter to Target your PROM
 Erase and Blank Check the PROM in iMPACT
Program and Verify the PROM in iMPACT
Switch the board mode to load from the PROM
Power Cycle/ Pulse PROG

If you follow these steps you shoudl eb able to scucesfully program the same image Via JTAG and form the PROM.

-paul






0 Kudos
Visitor jrjbertram
Visitor
13,947 Views
Registered: ‎09-23-2007

Re: Spartan 3 Starter Kit - programming design

I have since been able to program the board using the Digilent board verification download (including making mods to the VGA VHDL, rebuilding, rebuilding PROM, etc).  Everything works as expected (and as described in the documentation).  As you say, I was able to program this over JTAG without switching modes with the jumpers.
http://digilentinc.com/Data/Products/S3BOARD/S3BOARD-demo.zip

I've been unable to get the Xilinx 'clock' reference design to work, however.
http://www.xilinx.com/products/boards/DO-SPAR3-DK/boards/clock.zip

I'm sure I must be doing something wrong.  Is there a set of typical things you'd normally look for to isolate the problem?  I've double checked that the device type is set the same (including package, speed, etc).  I believe I'm generating the MCS PROM file the same way (but the GUI doesn't really provide me a way to doublecheck).  The Xilinx Spartan-3 starter clearly looks the same as the digilent board.  Any idea why they'd be different?

Thank you,
- Josh.
0 Kudos
Visitor jrjbertram
Visitor
13,945 Views
Registered: ‎09-23-2007

Re: Spartan 3 Starter Kit - programming design

Ah.. spoke too soon.  I think I see what's going on now.  When I generate a build, I'm generating "<project name>.bit".  There's also a "<project name>_cclktemp.bit" file in the same directory that's not getting updated.  I believe the MCS file is using the cclktemp.bit file...?  But I can't figure out how to regenerate it.

- Josh.
0 Kudos
Visitor jrjbertram
Visitor
13,928 Views
Registered: ‎09-23-2007

Re: Spartan 3 Starter Kit - programming design

After starting from scratch based on the instructions at:
http://www.princeton.edu/~wolf/EE375/labs/lab4.html

... I was able to create a very simple project that turned on/off the LEDs using the switches.  I had no problems generating a BIT file that could be programmed on the FPGA, and generating a PROM file that "worked" after programming & a power cycle.

I went back to the reference designs and found that I had the part speed set to "-5" when it should have been "-4", and I was generating the PROM file using "CCLK" instead of "JTAG" as the clock in the "Startup Options" within the Generate Programming File Properties dialog box.

Also, something else I noticed was that I was not able to program the FPGA directly with the BIT file unless I generated the mask file and verified the FPGA.  When I did not verify what was programmed into the FPGA, I got an error saying that done did not go high.  Is that a bug in the program, or does the FPGA just need that after being programmed?  I saw several other threads on the forums and the web on the same topic... seems like multiple people are running into it.

If you Xilinx folk care, I'd recommend creating a simple tutorial like the princeton link above.  It would've saved me several hours of frustration evaluating your component and tools.

Thanks,
- Josh.

0 Kudos