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Visitor
Visitor
7,771 Views
Registered: ‎03-01-2016

Spartan 3A - Storing large number of reg values

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Hi all, 

 

I am attempting to save a large number of 16-bit values in my design using the Spartan 3A.

 

First I attempted to simply create 1000 16-bit registers using the following verilog code.

 

reg [15:0] addr_saved [1000:0];

 

 

However, when I try to synthesis this ISE report "Device Utilization Summary" states that Total Number Slice Registers is OVERMAPPED. After doing a bit of research I found out that ISE is attempting to use LUTs to synthesis the memory and that this data can be stored in block RAM (BRAM) instead.

I also found out that my Spartan derivative has 11K of distributed RAM and 54K of block RAM. However I have no clue as to how to instruct ISE to place this data in BRAM.

I tried adding the following in front of my reg.

(* ram_style = "block" *)
reg [15:0] addr_saved [100:0]; //reg [11:0] mem [2047:0];

I also set synthesis->process properties ->HDL options -> RAM style equal to blocks.

 

So, have I got this completely wrong? Is my understanding that the Spartan 3A has RAM which can be used to store data in this fashion incorrect? Or am I just invoking it incorrectly?

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Guide
Guide
15,023 Views
Registered: ‎01-23-2009

Re: Spartan 3A - Storing large number of reg values

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Yes, Spartan-3A (like other families) have block RAMs.

 

However, block RAMs are RAMs and hence have the characteristics of RAMs. Most notably, they have one or two ports that can each do one read or one write per clock cycle (and in some cases, both, if they are to the same address). Also, the reads in Xilinx block RAMs are synchronous - the data is available on the clock cycle after the address is applied (distributed RAM reads are asynchronous - the data is available in the same clock as the address is applied).

 

In order for the synthesis tool to be able to map a large register array to a block RAM, the access patterns must conform to these limitations. If not, then, in spite of the tool options and the attribute, the register array will have to be mapped to flip-flops.

 

Xilinx provides templates for how to properly infer RAMs, both in the Synthesis User Guide (UG627, chapter 3, section "RAMs and ROMs HDL Coding Techniques"), and in the language templates from the tool (use the little "lightbulb" icon in the Project Navigator).

 

Avrum

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Highlighted
Guide
Guide
15,024 Views
Registered: ‎01-23-2009

Re: Spartan 3A - Storing large number of reg values

Jump to solution

Yes, Spartan-3A (like other families) have block RAMs.

 

However, block RAMs are RAMs and hence have the characteristics of RAMs. Most notably, they have one or two ports that can each do one read or one write per clock cycle (and in some cases, both, if they are to the same address). Also, the reads in Xilinx block RAMs are synchronous - the data is available on the clock cycle after the address is applied (distributed RAM reads are asynchronous - the data is available in the same clock as the address is applied).

 

In order for the synthesis tool to be able to map a large register array to a block RAM, the access patterns must conform to these limitations. If not, then, in spite of the tool options and the attribute, the register array will have to be mapped to flip-flops.

 

Xilinx provides templates for how to properly infer RAMs, both in the Synthesis User Guide (UG627, chapter 3, section "RAMs and ROMs HDL Coding Techniques"), and in the language templates from the tool (use the little "lightbulb" icon in the Project Navigator).

 

Avrum

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Visitor
Visitor
7,737 Views
Registered: ‎03-01-2016

Re: Spartan 3A - Storing large number of reg values

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Hi Avrum, 

 

Thanks for your quick response. I was surprised by the solution when I first read your response but it does make sense. I have since managed to create a BRAM module using the language templates you suggested and everything seems to be working correctly.

 

I am still a novice FPGA programmer and I must admit while I was aware of the ipcore generator, I was not aware of the language templates. These are a fantastic resource to know about.

 

Thanks again for your help!

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