11-03-2011 01:27 PM
I have an input signal that is 1.8V CMOS that is connected to an IO bank that is tied to 3.3V.
If I specify the IOSTANDARD as LVCMOS18 in the UCF, will it trigger at 1.8V CMOS levels or are all IOs on that bank triggred at 3.3V CMOS levels?
All other signals on that bank are 3.3V CMOS signals.
11-03-2011 02:31 PM
11-03-2011 02:56 PM
In Spartan-6 an input that use the LVCMOS18 IOSTANDARD is not tied to the VCCO level, so it can be placed in a bank with a VCCO of 3.3V. If the LVCMOS18_JEDEC IOSTANDARD is used then the VCCO level most be 1.8V.
See Table 7 of the Spartan-6 data sheet DS162.
11-03-2011 03:11 PM - edited 11-03-2011 03:11 PM
I keep forgetting that S6 has all those "strange and odd features."
Thanks for the correction,