Spartan6 - Which IO modes have clamp diodes?

[cwavnew]

Spartan6 - Which IO modes have clamp diodes?

In Figure 1-22 of the SelectIO Resource manual you see the power diodes present.  Are these only present in the PCI modes, or are they also present in the LVTTL modes (and others)?  The data sheet and UG381 document does not specify when these diodes are present.

I see the max current spec of 10mA through the diodes, but in which modes are they present?

[eteam00]

Spartan6 - Which IO modes have clamp diodes?

The only IO "modes" or standards with clamp diodes are PCI (e.g. PCI33_3 and PCI66_3).  Clamp diodes to VCC(O) are a requirement of the PCI specification.

The data sheet and UG381 document does not specify when these diodes are present.

In UG381 (v1.4):  Figure 1-22

In DS162 (v1.11):  Table 2 and Table 9, VIN(max) is VCCO+0.5, inferring clamp diode to VCCO - also Table 2 Iin clamp diode reference.

- Bob Elkind

[cwavnew]

We need an input with clamp diodes, but a VCCO of 1.5V for our logic level.

Can we tell it to use the PCI33_3 standard (to enable the clamp diodes) and set the VCCO to 1.5V?

This would make our Vil = 0.45V max and Vih = 0.75V min which is what we need.

[eteam00]

We need an input with clamp diodes, but a VCCO of 1.5V for our logic level.

Can we tell it to use the PCI33_3 standard (to enable the clamp diodes) and set the VCCO to 1.5V?

This would make our Vil = 0.45V max and Vih = 0.75V min which is what we need.

This is a good question for the Xilinx apps wizards.  I don't think the ISE tools are specifically aware of VCCO supply, but I'm sure the tools infer VCCO supply voltage from the IOSTANDARDs which are declared for each IO bank.  PCIxx would infer VCCO=3.3V.  Any declared output IOSTANDARD which conflicts with VCCO=3.3V for the same IO bank would certainly provoke an error (not warning) message.

You may be able to accomplish your intended result... or perhaps there is a technical (IO structure design) issue which precludes this, or perhaps this is a configuration not supported by the SW tools, or perhaps both.  Someone with inside knowledge of both the tools and the silicon is needed to authoritatively answer your question.

- Bob Elkind

[eteam00]

We need an input with clamp diodes, but a VCCO of 1.5V for our logic level.

Can we tell it to use the PCI33_3 standard (to enable the clamp diodes) and set the VCCO to 1.5V?

This would make our Vil = 0.45V max and Vih = 0.75V min which is what we need.

[gszakacs]

As Bob indicated, this is a question for the Xilinx gurus, but I'd be

very cautious of doing this myself for two reasons.

1) Does the clamp diode really get turned on if Vcco is only 1.5V?

2) Where is the threshold for Vih and Vil actually generated?  Is it ratiometric

to Vcco?  Or is it like LVTTL, i.e. fixed and perhaps dependent only on Vccaux?

-- Gabor