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Explorer
6,676 Views
Registered: ‎07-28-2010

## Trigger two FPGA boards at the same time which are very far

Bob,

Continued  from previous posts ,

Here is the result of time based trigeering. Which means , two FPGA boards which are placed around  4 kilometers apart are asked to acquire the data from the power cable at the same time with the help of GPS.  Plot shows the triggering instant in both boards which are kept in laboratory  captured by an oscilloscope. This is the result as expected.

Once the acquired data from both boards are collected back to PC , Data sets needs to be alighned . For perfect alighnment , accurate time delay between the triggering instants must be known.  When two boards are apart , I have no clue to calculate the time delay between them  rather than using the GPS again.  I am not interested to use GPS again since two GPS receivers has + or - 100 ns worst case drift .  Maximum allowed error In alighnment bewteen data sets  is of the order of  say 15 to 20 nano seconds.

Is there anyway to calculate the time delay between triggering instants using the frequency stability figure of the oscillator used in both boards ? . Point which makes me to think in that way  is , triggering instants between two boards as shown in the plot are varies linearly with time. Moreover I know the running duration of the oscillator with aid of free running counter inside FPGA. Using that counter value if  I use the classical formula  as

Actual running duration of the oscillator =  (counter value  * oscillator frequency stability in PPM) / 1000000.

May be this idea won't work .Since frequency stability does not follow monotonic .Also ageing applies .

Kind Regards

Faisal

13 Replies
Teacher
6,651 Views
Registered: ‎09-09-2010

## Re: Trigger two FPGA boards at the same time which are very far

Suggestion:
Control the triggering from a Master station exactly intermediate between the 2 Sampling stations.

Unfortunately, this scheme does not scale well to 3 or more Sampling stations.

------------------------------------------
"If it don't work in simulation, it won't work on the board."
Explorer
6,649 Views
Registered: ‎07-28-2010

## Re: Trigger two FPGA boards at the same time which are very far

Thanks ,

Control the triggering from a Master station exactly intermediate between the 2 Sampling stations.

Sorry ,I can't follow you .Do you mean I need third board ?

Faisal

Scholar
6,629 Views
Registered: ‎07-09-2009

## Re: Trigger two FPGA boards at the same time which are very far

Still don't kow what yoru trying to do,

what are you trying to do with the gps ?

do you want to PM us ?

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
Teacher
6,625 Views
Registered: ‎09-09-2010

## Re: Trigger two FPGA boards at the same time which are very far

@pfaisalbe wrote:

Thanks ,

Control the triggering from a Master station exactly intermediate between the 2 Sampling stations.

Sorry ,I can't follow you .Do you mean I need third board ?

Faisal

If you adopted this method, yes.

------------------------------------------
"If it don't work in simulation, it won't work on the board."
Explorer
6,624 Views
Registered: ‎07-28-2010

## Re: Trigger two FPGA boards at the same time which are very far

John,

Aim of the design is synschronised data acquisition . For Synchronization I have used GPS  in a different way. Also my aim is to reduce the synchronization error to as much as possible unlike conventional systems. May be not possible. If I use GPS again to calculate the time delay between two boards , Fault location in power cable  will oscillate plus or - 10 meters.

I am interested to have something around plus or minus 2 meters to please the utility. Over ambitious.

Regards

Faisal

Teacher
6,618 Views
Registered: ‎07-21-2009

## Re: Trigger two FPGA boards at the same time which are very far

Faisal,

One possible counter-measure for systemic timing offset between the two measuring points is this:

• Measure apparent delay between the two points in each direction.  One measurement should have the offset incorporated as a positive offset, the second measurement should have the offset incorporated as a negative offset.  With both measurements it should be straightforward to arithmetically calculate the true timing offset between the two measuring points.

As for short-term jitter, the customary countermeasure is repeated measurements with averaging.

When operating at the limits of the capabilities of your technology, don't be surprised if you must garnish your fundamentally sound system design with empirical modifications (tweaks, in the common language of engineering) to realise best possible performance.  Don't be afraid to experiement.

Do you have a large spool of cable with which to emulate distant measurement points?

-- Bob Elkind

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Explorer
6,604 Views
Registered: ‎07-28-2010

## Re: Trigger two FPGA boards at the same time which are very far

Many Thanks Bob,

I will try not to grow this post to long.

Measure apparent delay between the two points in each direction.  One measurement should have the offset incorporated as a positive offset, the second measurement should have the offset incorporated as a negative offset.  With both measurements it should be straightforward to arithmetically calculate the true timing offset between the two measuring points

I can do that. Not sure what  point you are trying to deliever. If the apparent delay between two points is same ( lets say < 50 ns error ) in several measurements done in both directions  for the same scenario, I should be fine. Question I am trying to find answer  is  Does  frequency stability of oscillator vs time follows perfect stratight line having slope of 45.0000000000 degree ?

Regards

Faisal

Teacher
6,598 Views
Registered: ‎07-21-2009

## Re: Trigger two FPGA boards at the same time which are very far

Does  frequency stability of oscillator vs time follows perfect stratight line having slope of 45.0000000000 degree ?

You should contact the oscillator manufacturer as the authoritative source for this information.  In principle, your question allows the possibility for infinite frequency deviation (to infinity) over time, all in the positive direction.  I suspect this is neither correct nor useful, or maybe I misunderstand your question.

Apologies for my previous 'helpful' post.  I thought you were seeking some way to zero out the timing offset between two (distant) measuring devices.

-- Bob Elkind

SIGNATURE:

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
Scholar
6,585 Views
Registered: ‎07-09-2009

## Re: Trigger two FPGA boards at the same time which are very far

HI

Ah OK,

I've been involved in some thing similar.

the solution we had was

a) free run 'good' oscilators at both ends

b) record a second marker. which both stations can receive, and is sufficiently far away that both are effectivly at the same distance.

then shrink / expand one trace to the other so the time marks allign,

you can get very good acuracy,

Look at something like sampling a far away radio station carrier.

phase allign that trace from both boards when you play back, and you are in good syncronisation.

if you want to a real long distance source , try noise from the sun,

that has content, and on the computer you can corellate between the two boards samples of noise.

that shoud give you very good syncronisation.

think of it like recording onto paper the two traces,

trace one at each site is the sun noise,

trace two at both sites is the singal your interested in.

layout both bits of paper, and slide along till the noise is over the top of each other.

then you have the second trace on both syncronised.

if the trace one goes out of phase, then that is because one free running clock is different to the other.

which is what you would expect.

if they are good clocks, do the maths as to how long it takes to get out of allignment to the degree you need.

if that matters, then you stretch one piece of paper, so the first trace is in phas eat all times that matter,

and stretch the second trace by the same amount, and you have even better phase accuracy.

This system is also used on radio telescopoes across multiple continents...

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
Teacher
3,413 Views
Registered: ‎09-09-2010

## Re: Trigger two FPGA boards at the same time which are very far

"Does frequency stability of oscillator vs time follows perfect stratight line having slope of 45.0000000000 degree ?"

Almost certainly not.
Anyway, because of component aging, the power supply output voltages will change very slightly with time (probably not monotonically), which will affect the oscillator instantaneous frequency. As will temperature (directly, and indirectly via the power supply).

------------------------------------------
"If it don't work in simulation, it won't work on the board."
Scholar
3,407 Views
Registered: ‎07-09-2009

## Re: Trigger two FPGA boards at the same time which are very far

have you any update on this interesting topic pfaisalbe?

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
Explorer
3,404 Views
Registered: ‎07-28-2010

## Re: Trigger two FPGA boards at the same time which are very far

Thanks Dr Johnsmith for your help and interest in my work.

I need to measure the time-offset between two boards from FPGA and I need to compare with time offset measured using scope. If they agree with least error I should be fine.

Learning  in parallel  with design creates lot of interefrrence in the project. I am not a native speaker of English. So my posts won't be polite. I do applogise for that.

Really thankful to Mr.Bob Elkind  for his help  to reach at this stage.

Kind Regards

Faisal

Teacher
3,399 Views
Registered: ‎07-21-2009

## Re: Trigger two FPGA boards at the same time which are very far

Faisal,

Has your question been answered, or are you still looking for alternative ideas or solutions?

-- Bob Elkind

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