I work for spartan 3a starter kit. The following program shows the Morse code on light bulbs my name and surname. With the help of dcm and multiplexer I want to switch to one of the frequency divided in half (from 50 MHz to 25 MHz). However, it turns out that the frequency is divided four times. How can I fix it? I would like to divide the frequency in half has been realized within the components.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
USE ieee.numeric_std.ALL;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity lab1 is
Port (clk : in STD_LOGIC;
en : in STD_LOGIC;
en1 : in STD_LOGIC;
en2 : in STD_LOGIC;
en3 : in STD_LOGIC;
LED : out std_logic_vector (7 downto 0));
end lab1;
architecture Behavioral of lab1 is
signal COUNT_OUT : STD_LOGIC_VECTOR(26 downto 0) := (others => '0');
signal name1 : std_logic_vector (0 to 60) := "1110101000111011100010100011100010111010001010001011101110111";
signal name2 : std_logic_vector (0 to 66) := "1010100010111010101010001110100010001110100011101011100011101110111";
signal name3 : std_logic_vector (0 to 76) := "10100011101110100011101110111000101110100010001011101110001010001110111011101";
signal count : std_logic_vector (0 to 10) := (others => '0');
signal temp : std_logic_vector (3 downto 0) := (others => '0');
signal clk_new : std_logic := '0';
signal clk_amount : integer := 50000000;
signal state : integer := 0;
COMPONENT my_dcm
PORT (CLKDV_SELECT_IN : IN std_logic;
CLKIN_IN: IN std_logic;
CLKDV_OUT: OUT std_logic;
CLKIN_IBUFG_OUT: OUT std_logic;
CLK0_OUT: OUT std_logic);
END COMPONENT;
begin
Inst_my_dcm: my_dcm PORT MAP (CLKDV_SELECT_IN => en3,
CLKIN_IN => CLK,
CLKDV_OUT => clk_new,
CLKIN_IBUFG_OUT => open,
CLK0_OUT => open);
process(en3)
begin
if(en3 = '1') then
clk_amount <= 25000000;
else
clk_amount <= 50000000;
end if;
end process;
process(clk_new)
begin
if rising_edge(clk_new) then
if (en = '1' and en1 = '0' and en2 = '0') then
if (conv_integer(COUNT_OUT) = clk_amount) then
COUNT_OUT <= conv_std_logic_vector(0, 26);
temp <= temp(2 downto 0) & name1(conv_integer(count));
LED(7 downto 4) <= temp;
count <= count + 1;
else
COUNT_OUT <= COUNT_OUT + 1;
end if;
elsif (en = '0' and en1 = '1' and en2 = '0') then
if (conv_integer(COUNT_OUT) = clk_amount) then
COUNT_OUT <= conv_std_logic_vector(0, 26);
temp <= temp(2 downto 0) & name2(conv_integer(count));
LED(5 downto 2) <= temp;
count <= count + 1;
else
COUNT_OUT <= COUNT_OUT + 1;
end if;
elsif (en = '0' and en1 = '0' and en2 = '1') then
if (conv_integer(COUNT_OUT) = clk_amount) then
COUNT_OUT <= conv_std_logic_vector(0, 26);
temp <= temp(2 downto 0) & name3(conv_integer(count));
LED(3 downto 0) <= temp;
count <= count + 1;
else
COUNT_OUT <= COUNT_OUT + 1;
end if;
elsif (en = '0' and en1 = '0' and en2 = '0') then
count <= (others => '0');
LED <= (others => '0');
temp <= (others => '0');
end if;
end if;
end process;
end Behavioral;
