cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
7,191 Views
Registered: ‎11-19-2013

pin output problem in spartan6

Hi sir,

    I encountered a problem in spartan6 pinout. I am using Lx25 CSG324 FPGA for may project and i want to output a signal from pin L4, but it seems can only output a high level even if i simply write "xout <= '0'". In my other boards i have used the pin L4 as a input pin, and it worked fine. Anyone can tell me waht wrong with it?

Thanks huang. 

0 Kudos
18 Replies
Highlighted
Xilinx Employee
Xilinx Employee
7,188 Views
Registered: ‎04-16-2012

Hi,

 

Try the below code:

 

signal temp;

xout <= temp;

 

i.e., declare a signal with initilization value as '0' and assign it to xout output.

 

Thanks

--------------------------------------------------------------------------------------------
Have you tried typing your question in Google? If not you should before posting. Also, MARK this is as an answer in case it helped resolve your query/issue.Give kudos to the post that helped you to find the solution.
0 Kudos
Highlighted
Scholar
Scholar
7,178 Views
Registered: ‎06-05-2013

Hello,

What error are you getting when you assign xout<= '0' ?
-Pratham

----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
----------------------------------------------------------------------------------------------
0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
7,169 Views
Registered: ‎07-31-2012

Hi Huang,


Firstly what happens if you assign this signal to a different pin on th board. Do you observe the normal behavior? Are you seeing a '1' or a '0'.

Thanks,
Anirudh

PS: Please MARK this as an answer in case it helped resolve your query.Give kudos in case the post guided you to a solution.
0 Kudos
Highlighted
7,166 Views
Registered: ‎11-19-2013

Hello,

    I'm sorry i didn't stated my problem clearly. I mean the pin L4 seems can only output '1' or 'z' when i wanted to output '0'.

Huang

0 Kudos
Highlighted
Scholar
Scholar
7,163 Views
Registered: ‎06-05-2013

did you followed the suggestion given by vuppala?

temp<='0';
xout<= temp;

you didn't mentioned the error code.

-Pratham

----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
----------------------------------------------------------------------------------------------
Tags (1)
0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
7,157 Views
Registered: ‎07-31-2012

Hi Huang,

 

Does it happen only with this pin? or any other pins on the board. Can you assign that signal to a different pin on the board and check the output. You just have to change the location constriants and check.

 

Thanks,
Anirudh

PS: Please MARK this as an answer in case it helped resolve your query.Give kudos in case the post guided you to a solution.
0 Kudos
Highlighted
7,154 Views
Registered: ‎11-19-2013

Hi Anirudh,

    I the others pins in this FPGA can output the signal as i expected. Only this pin can not output '0'. 

Thanks Huang.

0 Kudos
Highlighted
7,145 Views
Registered: ‎11-19-2013

My code is very simple, as below:

entity sim is  
   port(xout : out std_logic
        );
end sim ;
architecture VER1 of sim is 
begin
xout <= '0' ;
end VER1;

xout is located at pin l4, and i measured this pin after power up by a oscilloscope, but the pin stated at high level. If i change the pin to another pin just by changging the LOC constraint in UCF file, the pin i changed to can output '0'.
Huang.
0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
7,137 Views
Registered: ‎07-31-2012

Hi,

 

Did you use this pin to drive any signal which is out of specification from the datasheet which might have shorted the output drivers. Or if  you have given in the UCF as output and driven and input into this then it might have got shorted.

 

In such a case the IO must have got shorted. One test would be to check the output from this IO when not signal is assigned to it. Also in the Implementation properties, change the Unused IO's to pull down and check.

 

 

 

Thanks,
Anirudh

PS: Please MARK this as an answer in case it helped resolve your query.Give kudos in case the post guided you to a solution.
0 Kudos
Highlighted
6,664 Views
Registered: ‎11-19-2013

Hi Anirudh,

    Do you mean this pin might have been shorted to the output drivers? Is there any pins in this FPGA have always been shorted to the output drivers?

    I checked the UCF, and deleted all the others pins LOC constrant, only "NET xout LOC = L4" left. Maybe i should try to change the unused pin to pull down in the implementation properties and check again.

Thanks Huang.  

0 Kudos
Highlighted
Historian
Historian
6,648 Views
Registered: ‎02-25-2008


@vuppala wrote:

Hi,

 

Try the below code:

 

signal temp;

xout <= temp;

 

i.e., declare a signal with initilization value as '0' and assign it to xout output.

 

Thanks


This shouldn't make any difference and is, frankly, a ridiculous suggestion. The simple assignment

 

    xout <= '0';

 

will work (I use such assignments to prevent pins from being optimized away all the time), unless the board is borked in some way.

----------------------------Yes, I do this for a living.
0 Kudos
Highlighted
Historian
Historian
6,646 Views
Registered: ‎02-25-2008


@huangj852010@163.com wrote:

Hi Anirudh,

    Do you mean this pin might have been shorted to the output drivers? Is there any pins in this FPGA have always been shorted to the output drivers?

    I checked the UCF, and deleted all the others pins LOC constrant, only "NET xout LOC = L4" left. Maybe i should try to change the unused pin to pull down in the implementation properties and check again.

Thanks Huang.  


ON YOUR BOARD -- this pin connects to the FPGA and what else?

 

Your simple assignment will work if the board isn't screwed up and something is pulling the pin high.

----------------------------Yes, I do this for a living.
0 Kudos
Highlighted
6,623 Views
Registered: ‎11-19-2013

Hi,

    I just want this pin to output a '0', and there is a external pull down register connected with this pin on my board. But this pin always output a '1'.  I've tried another board which used the same type of FPGA, and its L4 pin can not output '0' too.   I think maybe there are some bugs in this FPGA.   

0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
6,615 Views
Registered: ‎01-03-2008

Please post the pad report file for the design as an attachement.

------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com
0 Kudos
Highlighted
6,564 Views
Registered: ‎11-19-2013

Hi m

     I'm sorry for taking such a long time to reply, because i was on a holiday. Could you tell me how to generate a  pad report file?

0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
6,559 Views
Registered: ‎01-03-2008

The PAD or Pinout report file is a normal output from your implementation flow through ISE.  You will find this in your implementation directory or if your are using the GUI it should be in the report list.

------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com
0 Kudos
Highlighted
6,543 Views
Registered: ‎11-19-2013

Hi mcgett,

     I generated the pad report today, posted it as an attachment

0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
6,516 Views
Registered: ‎01-03-2008

The XOUT port is correctly assigned to pin L4 and it is declared as an OUTPUT, so it should be working and in your code with an assignment to logic 0, should be outputing a ground.  


In a prior post you stated that that it is either a logic 1 (3.3V) or a Z state.  Based on what has been written here there is either an assembly issue and the pin is not correctly soldered to the board or this IO has been damaged by ESD is no longer functioning.

------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com
0 Kudos