12-05-2013 01:50 PM
I'm trying to generate DCM by Clocking Wizard for Cascading In Series With Two DCMs.
I want to use an internal clock signal for the input to the Cascading DCMs. But the default option is external input clock. It appears I can not change it. Why it's disabled for internal clock input?
FPGA: Spartan-3E XC3S250
ISE: ISE 14.4
12-05-2013 02:26 PM
Looking at the reference usage , it looks like the clock input for first instance should be external.
12-05-2013 06:50 PM
12-06-2013 02:46 PM
It's generated by another single DCM.
What I want to do is:
External clock -> single CDM -> Cascading In Series With Two DCMs