We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!


Problem with Spartan 6 ..GPU clock

Posts: 1
Registered: ‎11-12-2017

Problem with Spartan 6 ..GPU clock


         I am getting input from GPU of 2048x1536 resolution .my gpu clock is 219 MHZ.while probing clock from gpu i have seen noise free clock signal but from spartan 6 FPGA i observed noise in the clock .because of this noise am not able to check the gpu pixel count exactly 2048 or not . so any solution to use noise free clock signal in FPGA inorder to find the pixel count

Posts: 1,406
Registered: ‎11-14-2011

Re: Problem with Spartan 6 ..GPU clock

How are you measuring the clock at the FPGA?


How is the clock routed from the GPU to the FPGA? What type of signal is the clock (e.g. single ended, LVDS, etc.)?


Exactly why is the noisy clock preventing you from "checking the pixel count"?


How are you handling the GPU input in the FPGA?

"That which we must learn to do, we learn by doing." - Aristotle