We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!


Spartan 3ADSP1800 board issue

Posts: 8
Registered: ‎02-12-2010

Spartan 3ADSP1800 board issue

Hi all,
Most of the testing I did for this was with PetaLinux, but it seems to also effect the default project, so I figure I'll post here in case someone can help me diagnose it.

I had PetaLinux happily running on my board for a bit, but I had to run some non-PetaLinux tests and after I went back, now the board doesn't boot to U-boot and the test app is also behaving strangely with similar behavior.  The last line I get from FS-Boot is "FS-BOOT: Booting image..." and from the test project " Reading : 0x20000000".  I didn't do anything too special in between, just some VHDL test projects to learn VHDL better.  Output below.  I am using Spartan 3ADSP1800 development board and all jumpers should be in their default positions.  I tried rebuilding a simple test project following the steps on the website and also tried the pre-built project and neither is working.  It goes into kermit and eventually says something about transmission errors, presumably because it never made it to U-Boot.  My thought is something is lingering in the flash that FS-Boot or U-Boot is finding and I was reading about bulk erasing the flash.  Is this maybe the culprit or did something maybe happen to my board?  Although I've never burned a new FPGA ROM, I have changed some of the flash stuff when working with PetaLinux, potentially corrupting the startup FPGA image.  In the boards user guide they had a link to the board info page that was suppose to contain the initial bitstream, but the only project I can find is the filter reference design.

Any help is much appreciated please let me know if you need more information.  Thanks!



Test app output:
            / /\/                                                   
            \ \       Xilinx Spartan3A DSP 1800A                    
            / /       Hello World and Board Bringup Test            

Walking the LEDs

Counting on the LEDs

Reading the DIP Switches
 SW3 = 0x0

Testing a region of DDR2 SDRAM
 Testing : 0x20000000 - 0x20ffffff
 Writing pseudo-random data...0x20fd8000
 Reading : 0x20000000
(nothing more)

petalinux: petalinux-v0.40-rc4.  I will upgrade to -final if PetaLogix
gives me a download link.
ISE/EDK: EDK 10.1 with latest updates.  I think only ISE web pack is
installed if that matters.
Host OS: Cent OS 5.3  base operating system,  most updates applied

FS-boot output:
FS-BOOT First Stage Bootloader (c) 2006 PetaLogix
Project name: Xilinx-S3DSP1800A-Rev1-MMU-edk101
Build date: Feb 11 2010 16:00:13  FS
Serial console: Uartlite
FS-BOOT: System initialisation completed.
FS-BOOT: Booting from FLASH. Press 's' for image download.
FS-BOOT: Waiting for SREC image....
FS-BOOT: Image download successful.
FS-BOOT: Warning image location differ from default boot location. Image
will not boot automatically after POR.
FS-BOOT: Press 'n' to boot old image.
FS-BOOT: Use new image.
FS-BOOT: Booting image...
(nothing more)