We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!


Spartan-6 DCM_CLKGEN input jitter spec

Posts: 17
Registered: ‎03-04-2009

Spartan-6 DCM_CLKGEN input jitter spec

Hi All,


The DCM_CLKGEN is claimed to have "Improved jitter tolerance on CLKIN" (UG382 v1.6, p73), but if you go to the current data sheet (DS162 v2.4) the DCM_CLKGEN section refers you back (Note 1, p63) to the same operating conditions table that is used by the regular DCM_SP in DFS mode (Table 55. p60).


I definitely would like some of that improved jitter tolerance!  Does anyone have any insights into this apparent anomaly?



Gerry L

Posts: 8,355
Registered: ‎07-21-2009

Re: Spartan-6 DCM_CLKGEN input jitter spec

[ Edited ]

I definitely would like some of that improved jitter tolerance!  Does anyone have any insights into this apparent anomaly?


I wouldn't call this an anomaly.  It's more like a case of oversimplified recommendations or a missing set of performance graphs.  Jitter tolerance is a transfer function, not a logic switching function.


Table 55 is not labeled  "Required Operating Conditions", it's labeled "Recommended Operating Conditions".


My guess is this:  Operating in DCM_CLKGEN mode, the DCM has -- by design -- greater input jitter tolerance.  If the increase in input jitter tolerance is quantified and published in the datasheet (DS162), then each and every production part must be tested against that specification.  That's an expensive analogue test for the production lines of a (primarily) digital logic device, even if a quantitative spec and test procedure could be concisely defined.  After all,  there are entire books written on the subject of clock jitter, its definitions, and measurement practices.


Having said that, it would be interesting to read a description of the differences in jitter tolerance for DCM_SP vs. DCM_CLKGEN mode, but by the time Xilinx' IP police 'cleanse' the description of anything which might disclose or hint at proprietary IP (i.e. trade secrets), the description might not be all that interesting, after all.


-- Bob Elkind

README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.