04-20-2012 02:14 PM
Here is the initial webcase response:
As you mentioned, UG380 states that the SUSPEND pin must be tied LOW for configuration. If this requirement is not respected the memory cell array may not be initialized correctly. Random data in the configuration memory, causes contentions. It is important to ensure the SUSPEND pin is low during power up and configuration.
We have not characterised behaviour other than SUSPEND being tied LOW for power-on and configuration, as this is our recommendation, and so, we cannot guarantee the behaviour if SUSPEND = 1 at power-on. Therefore, it is difficult to predict what will happen.
-- Bob Elkind
04-23-2012 05:03 AM
I have patched my 6-layer-board (mill the board from rear side till the ball of FPGA) and connect the suspend-pin to GND. But the FPGA don't configure.
So I have inspected everything over again and have found my mistake. One mode-pin was not connected properly!
Thanks all for help!
04-23-2012 05:06 AM
Congratulations on finding the error.
-- Bob Elkind
04-23-2012 05:30 AM
04-23-2012 05:41 AM
Just a note for next time you need to debug this sort of problem:
Impact allows you to view the state of the configuration pins. You should have been
able to see the state of the mode pins as seen by the internal logic just by using
one of the debug functions of Impact. Especially with BGA's this is a valuable tool.
When I design a board with BGA's I typically require the layout designer to place a
via for each unconnected pad just in case I find I needed to make a connection.
It helps you to avoid the sort of rework you show in your nice picture.