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marknaivar
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Registered: ‎06-20-2019

Abnormal program termination (EXCEPTION_ACCESS_VIOLATION) in VHDL synthesis (Vivado 2020.2)

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We are thinking of upgrading from 2016.4 to to 2020.2 of Vivado, and I installed it to try my VHDL design. It is causing the compiler to crash during synthesis. In a series of fortunate events, I was able to to isolate the issue. I can change a single line of code and either cause or avoid the crash consistently. Of course the one line of code really changes what the logic does, but I was thinking this might be a good way to recreate the bug and track down the main issue?

I cannot post the entire source code in public as it is part of my company's product line. But here is a simplified version of the code that's causing the crash:

theProcess: process(clk)
  variable v1: unsigned(15 downto 0);
  variable v2: unsigned(15 downto 0);
  variable vMatched: std_logic;
  variable v1Index: unsigned(7 downto 0) := (others => '0');
  variable v2Index: unsigned(7 downto 0) := (others => '0');
  variable vL1: natural := 0;
begin
  if rising_edge(clk) then

    Strobe_o <= '0';

    if Busy = '0' then
      if StartedStb = '1' then
        -- Start a new match sequence.
        Busy <= '1';
        vMatched := '0';
        v1Index := (others => '0');
        v2Index := (others => '0');
        vL1 := cL1_MATCH_COUNT-1;
        BestDiff <= DiffMax;
        L1Index <= (others => '0');
        L2Index <= (others => '0');
      end if;
    else
      -- Find the closest match.
      v1 := L1Time(vL1);
      vDiffBest := BestDiff;
      for vL2 in cL2_MATCH_COUNT-1 downto 0 loop
        v2 := L2Time(vL2);
        if v1 > v2 then
          vDiff := v1 - v2;
        else
          vDiff := v2 - v1;
        end if;

        -- Using the line below will crash Vivado 2020.2 with
        -- ACCESS_VIOLATION (JVM).
**     if vDiff < vDiffBest then
        --
        -- Using the line below works fine with Vivado 2020.2.
**     -- if vDiff < vDiffBest and vMatched = '0' then
          vMatched := '1';
          vDiffBest := vDiff;
          v1Index := to_unsigned(vL1, 8);
          v2Index := to_unsigned(vL2, 8);
        end if;
      end loop;
      if vDiffBest < BestDiff then
        BestDiff <= vDiffBest;
        L1Index <= v1Index;
        L2Index <= v2Index;
      end if;

      -- Advance to the next L1 time or stop.
      if vL1 > 0 then
        vL1 := vL1 - 1;
      else
        -- Match is complete, set out strobes/data.
        Strobe_o <= vMatched;
        Match1_o <= L1Index;
        Match2_o <= L2Index;
        Busy <= '0';
      end if; -- count
    end if; -- Busy
  end if; -- clk_i
end process theProcess;

 

NOTE: I don't know if the code above will actually compile, I just stripped/simplified the original code.

The two lines marked with '**' are the ones that I change to cause the crash or not. So it seems like the JVM crashes when trying to synthesize the more complicated version of the loop code. This works fine with 2016.4 so it something that changed since then.

I am working on making a simple project with fewer source files to recreate the crash which I could provide (privately) if needed.

I really want to upgrade to 2020.2 there are some nice updates. But I can't upgrade to something that can't compile this design.

 

Thanks,

-Mark

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pulim
Xilinx Employee
Xilinx Employee
219 Views
Registered: ‎02-16-2014

HI @marknaivar 

Sent you private message to get this testcase. Please check.

 

Thanks,

Manusha

View solution in original post

1 Reply
pulim
Xilinx Employee
Xilinx Employee
220 Views
Registered: ‎02-16-2014

HI @marknaivar 

Sent you private message to get this testcase. Please check.

 

Thanks,

Manusha

View solution in original post