## Synthesis

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Regular Visitor
Posts: 22
Registered: ‎11-10-2010

# Add IO BUFFERs on XPS and ISE

I have a design using a spartan 6 .I am using XPS for the embedded part .And the that design is instantiated in a ISE project .

But some output signals are not comming out .I do behavioral simulation and all is ok .When i do Translate,map and route simulation .I have the same problem that i see in the bitstream my output signals from the embedded design in XPS get routed but they are not there .Or is like the three state pin in the IO block is not driven .Where is this comming from?

I have the setting ADD IO BUFFERS checked .

Any ideas?/

Expert Contributor
Posts: 7,963
Registered: ‎08-14-2007

# Re: Add IO BUFFERs on XPS and ISE

I'm a little confused on "my output signals from the embedded design in XPS get routed but they are not there"

What exactly is not there?  The output buffers?  If those are not there then what gets routed?

Have you tried cleaning the hardware in XPS and then building from ISE?

-- Gabor

-- Gabor
Regular Visitor
Posts: 22
Registered: ‎11-10-2010

# Re: Add IO BUFFERs on XPS and ISE

Well the signal from the xps project gets routed to the output buffer .I can see it on the Fpga editor .But nothing comes out from that  pin . is like the enble pin on the buffer is not set .This should be set aumatically with the Add IO buffer option checked .

But if i set a 1 on those pins from the Ise project side The output is high no problem .If i do ot from the XPS side .Now there is the same problem nothing comes out.Wow

Expert Contributor
Posts: 7,963
Registered: ‎08-14-2007

# Re: Add IO BUFFERs on XPS and ISE

The output buffer will be automatically enabled for outputs, unless the outputs

have tri-state terms in the source.  Bidirectional pins would need to be enabled

by the design.  Are you talking about GPIO pins?  Those would certainly need

to be enabled for output by your C source code.

-- Gabor

-- Gabor