02-23-2015 06:39 AM
Could someone please explain this phenemenon to me?
I have a design with a memory block consisting of two different 256x8 memory blocks implemented as distibuted memory. When I look at the sysnthesis report, this checks out. I decided to merge these two blocks into one large 512x8 BRAM using Coregen's Block Memory Generator. Everything works fine when i synthesize and implement the design, but this design uses significantly more LUTs than the distirbuted memory version. Why is this and is there something I can do to minimize the number of LUTs used?
02-23-2015 08:07 AM
please post the before and after usgae reports.
"signifinaly more" is difficult to comment on.
02-26-2015 07:57 AM
Thanks for the reply.
Maybe "significantly" more is relative, but the distributed memory implementation uses 33 LUTS (as expected) but the BRAM uses 162 LUTs and the BRAM blocks.
02-26-2015 08:08 AM
Have you looked at the RTL schematic?
The numbers you state are in the noise. Sometimes LUT are used as a pass-thru (away to just get to someplace), they may also be required for options you have selected, or they may be inferred by the synthesis (i.e. clock enables).
If it isn't being used, and there is nothing else that needs a resource, the tools are happy to use the resources however they wish. Changing the period constraints, or other strategies and directives, along with testing a much larger design will all affect usage. Generally, in the small, results vary widely, and are no indication of anything.
02-26-2015 08:10 AM
That actually makes a lot of sense, thanks Austin! I will look at the schematic tomorrow to see if I can track down the difference.