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Visitor
198 Views
Registered: ‎03-27-2018

Can I redistribute the code inside the Language Template?

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I am writing modules using chisel3, which is a DSL for hardware and convert the code into Verilog to be used by Vivado.

However, in chisel3, the initial block for BRAM is not supported.

So now I have to use the BRAM Verilog code from language template window in Vivado.

Now I wonder if I am permitted to use the language template outside of Vivado in my chisel3 project? And I wonder if it is legal to publish the project with the BRAM Verilog code?

Thanks

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1 Solution

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Moderator
Moderator
154 Views
Registered: ‎03-16-2017

Re: Can I redistribute the code inside the Language Template?

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Hi @headspin

UG 901 has various BRAM examples for its inference in Vivado. You can use it in your project. 

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_1/ug901-vivado-synthesis.pdf

(Page 74, click on link and download the zip) 

Regarding the legal thing, you might need to ask your FAE. I am not sure about it because we do handle technical issues here. 

 

Regards,
hemangd

Don't forget to give kudos and mark it as accepted solution if your issue gets resolved.
1 Reply
Moderator
Moderator
155 Views
Registered: ‎03-16-2017

Re: Can I redistribute the code inside the Language Template?

Jump to solution

Hi @headspin

UG 901 has various BRAM examples for its inference in Vivado. You can use it in your project. 

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_1/ug901-vivado-synthesis.pdf

(Page 74, click on link and download the zip) 

Regarding the legal thing, you might need to ask your FAE. I am not sure about it because we do handle technical issues here. 

 

Regards,
hemangd

Don't forget to give kudos and mark it as accepted solution if your issue gets resolved.