05-10-2011 01:23 AM
I'm designing a system using Spartan 6 and microblaze with two peripherals (tx and rx). In the future these two peripherals will be in different devices, so in differents fpgas, but at the moment they are in the same fpga connected throw external pins.
TX peripheral have data and clock outputs (spi interface) to the RX peripheral. Data rate must be variable in a range about 10-5 Mhz, so the clock output, synchronized with data, must be also variable. RX peripheral have data and clock inputs.
For that porpouse there is a DCM with 125 Mhz clock input and a simple clock division process in the output (a counter with a limit wich let's me change the rate).
I can see with a external logical analyzer that TX appears to work well. I change the clock rate and everything it's ok. However, RX clock "stops" when i do a rate change. It's a very strange behaviour.
I don't know if that's a good strategy to solve my problem.... ¿Any idea?
Thanks in advance!!!
PD: Moderators, i don't know if this is the best place to my post. Move it if necesary.
05-10-2011 01:40 AM
05-10-2011 01:52 AM
I'm usign EDK 12.3
Simulations are good. In fact, it starts working ok and the receiver clock stops after the first rate change. I could see that using chipscope analyzer.
It's very confusing because with osciloscope i can see that clock is ok in the external pin but it's dead inside.
05-10-2011 05:28 AM
05-10-2011 08:11 AM
When you change anything using DRP in tghe DCM, you need to reset the DCM. Changing the clock speed also means that when you reset the DCM, you should probably also reset everything else.