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Explorer
Explorer
12,061 Views
Registered: ‎05-07-2012

Could not find cell 'U0' within module

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I'm getting Vivado General Synthesis "Could not find cell 'U0' within module" errors associated with a few Vivado IP Catalog cores.  I have many more IP Catalog cores in the design for which there are no errors.  An example error is,

 

[Designutils 20-1275] Could not find cell 'U0' within module 'GTX_Clk_Gen' for instance 'emc/ecg'. The XDC file c:/Users/rbackhus/Documents/GEOSTAR/FromLinux/GEOSTAR_Demonstrator_Control/GEOSTAR_Demonstrator_Control.srcs/sources_1/ip/GTX_Clk_Gen/GTX_Clk_Gen_board.xdc will not be read for this cell.

 

I tried regenerating the core outputs and that didn't change anything.  These errors are from a Xilinx tool synthesizing Xilinx IP Catalog generated cores.  None of this is mine so I'm really sure what the problem is here.

 

This is Vivado 2014.4 running on 64 bit Windows 7.

 

Any ideas?

 

Thanks. 

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Explorer
Explorer
20,374 Views
Registered: ‎05-07-2012

Re: Could not find cell 'U0' within module

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After a week working this problem the web case engineer concluded that when one builds a core out of context, black box attributes are generated which are to be pasted into the source with the component declaration.  Then when I deselected the out of context selection, I failed to remove the black box attributes from my code.  Nevertheless, the clock wizard put the black box attributes in the vho file whether the clock was built out of context or not.  In that case I just removed the attributes even though they were included in the vho file.  All the critical warnings went away. 

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7 Replies
Explorer
Explorer
12,055 Views
Registered: ‎05-07-2012

Re: Could not find cell 'U0' within module

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I misspoke above.  These arn't errors.  They are critical warnings. 

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Xilinx Employee
Xilinx Employee
12,037 Views
Registered: ‎04-16-2012

Re: Could not find cell 'U0' within module

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Hello,

 

Are you generating the IPs in OOC flow?

 

Thanks,

Vinay

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Xilinx Employee
Xilinx Employee
12,030 Views
Registered: ‎09-20-2012

Re: Could not find cell 'U0' within module

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Hi,

Can you open the elaborated design and compare the connectivity of this failing ip instance with that of passing one? Are all the inputs to the ip instance connected properly?

Also open synthesized design and check if the tool by chance renamed the U0 cell to something else.

Thanks,
Deepika.
Thanks,
Deepika.
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Explorer
Explorer
12,008 Views
Registered: ‎05-07-2012

Re: Could not find cell 'U0' within module

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I generated all my cores out of context but then switched them all back out of OOC and am now doing "General Synthesis", I think it is called where the project synthesis builds all the code including the cores.

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Explorer
Explorer
12,007 Views
Registered: ‎05-07-2012

Re: Could not find cell 'U0' within module

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Yes, I checked that.  The ports are properly connected on all my cores.

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Xilinx Employee
Xilinx Employee
11,990 Views
Registered: ‎09-20-2012

Re: Could not find cell 'U0' within module

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Hi,

Can you apply DONT_TOUCH constraint on the problematic IP instance and see if it helps? Below is the xdc syntax

Example: set_property DONT_TOUCH TRUE [get_cells inst]

Thanks,
Deepika.
Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
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Highlighted
Explorer
Explorer
20,375 Views
Registered: ‎05-07-2012

Re: Could not find cell 'U0' within module

Jump to solution

After a week working this problem the web case engineer concluded that when one builds a core out of context, black box attributes are generated which are to be pasted into the source with the component declaration.  Then when I deselected the out of context selection, I failed to remove the black box attributes from my code.  Nevertheless, the clock wizard put the black box attributes in the vho file whether the clock was built out of context or not.  In that case I just removed the attributes even though they were included in the vho file.  All the critical warnings went away. 

0 Kudos