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Newbie
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Registered: ‎02-27-2020

## DSP48E Throughput upto 600 MHz

Hi,

I am trying to perform multiplication of two 12-bit integers, aiming a throughput of 600 Mhz on Virtex 6 LX240-1 device. I am coding in Verilog HDL. However, the maximum throughput I am getting is only 245 Mhz throughput, i,e  245M outputs. I observe it in post-route simulation using ModelSim, where the input to output delay of DSP48E1 block is approximately 4.1nsec. I use clk derived from MMCM, whose output is 250 MHz. If I increase the clk frequency from 250 Mhz to say 300 Mhz the output of DSP48 is 0. Apparently, it seems the DSP48E1 can not multiply faster than 245 MHz. How would I achieve 600 MHz throughput as quoted in the datasheet, (or may be I have misunderstood something)?

From the PlanAhead, I can see, input operands are mapped to Port A and B of DSP48E1 block and output to Port P/PCOUT.

What can I do to speed up the multiplication and increase the throughput of the multiplier/DSP48E1?

following is sample code snippet:

module multiplier (inA, inB, outC, clk, reset, MMCM_Locked )

input [11:0] inA;

input [11:0] inB;

input clk, reset, MMCM_Locked;

output reg [23:0] outC;

Always @ (posedge clk)

begin

if(reset)

outC <= 24'd0

else

begin

if (MMCM_Locked == 1'b1)

outC <= inA *inB;

end//else

end

Thanking in anticipation,

1 Solution

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Scholar
365 Views
Registered: ‎04-26-2015

## Re: DSP48E Throughput upto 600 MHz

First things first, if you have a look at Table 58 in DS152, you'll find that the absolute maximum speed for the DSP slice is only 450MHz (the 600MHz figure is for the -3 speed grade). After that, you'll also see that to get above 262MHz you need need all the internal registers active (so it'll take multiple clock cycles to perform each multiply, but because it's pipelined you can still get results at 450MHz). I suspect that if you just insert a bunch of registers before/after your multiply, ISE will happily turn those into the DSP internal registers - or you can use the explicit instantiation.

2 Replies
Scholar
366 Views
Registered: ‎04-26-2015

## Re: DSP48E Throughput upto 600 MHz

First things first, if you have a look at Table 58 in DS152, you'll find that the absolute maximum speed for the DSP slice is only 450MHz (the 600MHz figure is for the -3 speed grade). After that, you'll also see that to get above 262MHz you need need all the internal registers active (so it'll take multiple clock cycles to perform each multiply, but because it's pipelined you can still get results at 450MHz). I suspect that if you just insert a bunch of registers before/after your multiply, ISE will happily turn those into the DSP internal registers - or you can use the explicit instantiation.

Highlighted
Newbie
327 Views
Registered: ‎02-27-2020