cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Visitor
Visitor
5,834 Views
Registered: ‎06-21-2013

Does Recursive Design Causes the Error: "More than 100% of Device resources are used"?

Jump to solution

Hello everyone,

I have always used RTL design method until now; however currently I need to make use of recursion since the "network" that I am trying to implement is a bit complicated.

Anyways,  I handled most of the problems, and simulation seems to be working fine. Despite some bit assignment warnings in the synthesis, I get the warning message "More than 100% of Device resources are used" and ofc the synthesis stops.

I attached my code below. It would be real great if anyone could help me.

By the way I am using Virtex 5 XC5VLX50 and package FF324. And I have Xilinx ISE Webpack.

0 Kudos
Reply
1 Solution

Accepted Solutions
Mentor
Mentor
7,461 Views
Registered: ‎11-29-2007
  1. The synthesis didn't "instantly stop", it successfully completed its task and did not even find any errors.
  2. In each line of the device utilization summary, a "*" on the right indicates that this resource is over-utilized.


Please google your question before asking it.
If someone answers your question, mark the post with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left).

View solution in original post

6 Replies
Mentor
Mentor
5,821 Views
Registered: ‎11-29-2007

Well, which of the resources are over-used? I would guess the IO pins, in which case: Don't worry, this would go away in a complete design.

 

Also, don't do this:

module A(x);

input x;

 

Instead, do this:

module A(input x);

 



Please google your question before asking it.
If someone answers your question, mark the post with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left).
Visitor
Visitor
5,816 Views
Registered: ‎06-21-2013

Well, at the error message I am not given info on which specific part of the devic is tried to be overused. The message is exactly like that:

 

 "(*) More than 100% of Device resources are used"

and I guess I cannot view the rest of the possible synthesis errors/warnings since I get this warning, because the synthesis tool instantly stops.

This could be a serious problem or is it certain that I can remove it when I add different modules?

Thanks a lot for the reply by the way.

0 Kudos
Reply
Mentor
Mentor
5,807 Views
Registered: ‎11-29-2007

Please post the complete synthesis report. If that is not possible, post the synthesis log.



Please google your question before asking it.
If someone answers your question, mark the post with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left).
Visitor
Visitor
5,791 Views
Registered: ‎06-21-2013

Hello awillen,

Thanks a lot for your help. I attached the synthesis report. I assume by checking the report IOB's are exceeded and I assume this problem will vanish when different blocks are instantiated. But anyways, I would like to hear your advice/comment.

0 Kudos
Reply
Mentor
Mentor
7,462 Views
Registered: ‎11-29-2007
  1. The synthesis didn't "instantly stop", it successfully completed its task and did not even find any errors.
  2. In each line of the device utilization summary, a "*" on the right indicates that this resource is over-utilized.


Please google your question before asking it.
If someone answers your question, mark the post with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left).

View solution in original post

Visitor
Visitor
5,779 Views
Registered: ‎06-21-2013

Thank you so much!

0 Kudos
Reply